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Characteristics of silicon-on-insulator single-electron transistors with electrically induced tunnel barriers

Kim, Kyung Rok , Kim, DH , Lee, JD , Park, BG

Article Issue Date2002-01 View22

Complementary self-biased logics based on single-electron transistor (SET)/CMOS hybrid process File

Song, KW , Lee, YK , Sim, JS , Kim, Kyung Rok , Lee, JD , Park, BG , You, YS , Park, JO , Jin, YS , Kim, YW

Article Issue Date2005-04 View14

Complementary Self-Biased Scheme for the Robust Design of CMOS/SET Hybrid Multi-Valued Logic

Kim, Kyung Rok , Song, KW , Lee, SH , Kim, DH , Kyung, J , Baek, G , Lee, CA , Lee, JD , Park, BG

Conference Paper Issue Date2003-05-16 View21

Coulomb oscillations based on band-to-band tunneling in a degenerately doped silicon metal-oxide-semiconductor field-effect transistor File

Kim, Kyung Rok , Kim, DH , Lee, JD , Park, BG

Article Issue Date2004-04 View31

Dynamic exclusive-OR gate based on gate-induced Si island single-electron transistor File

Kim, DH , Kim, Kyung Rok , Sung, SK , Lee, JD , Park, BG

Article Issue Date2002-05 View21

Fabrication of single-electron tunneling transistors with an electrically formed Coulomb island in a silicon-on-insulator nanowire File

Kim, DH , Sung, SK , Kim, Kyung Rok , Lee, JD , Park, BG

Article Issue Date2002-07 View28

Field-induced interband tunneling effect transistor (FITET) with negative-differential transconductance and negative-differential conductance File

Kim, Kyung Rok , Kim, HH , Song, KW , Huh, JI , Lee, JD , Park, BG

Article Issue Date2005-05 View33

High spatial density nanocrystal formation using thin layer of amorphous Si0.7Ge0.3 deposited on SiO2 File

Yoon, Tae-Sik , Kwon, JY , Lee, DH , Kim, KB , Min, SH , Chae, DH , Kim, DH , Lee, JD , Park, BG , Lee, HJ

Article Issue Date2000-03 View25

Nanocrystal memory cell using high-density Si0.73Ge0.27 quantum dot array

Chae, DH , Kim, DH , Lee, Y , Kwak, CH , Lee, JD , Park, BG , Yoon, Tae-Sik , Kwon, JY , Kim, KB , Kim, KR , et al

Article Issue Date1999-12 View17

Negative-differential transconductance characteristics at room temperature in 30-nm square-channel SOI nMOSFETs with a degenerately doped body File

Kim, Kyung Rok , Kim, DH , Sung, SK , Lee, JD , Park, BG

Article Issue Date2002-10 View23

Novel J(eff)=1/2 Mott state induced by relativistic spin-orbit coupling in Sr2IrO4 File

Kim, BJ , Jin, Hosub , Moon, SJ , Kim, JY , Park, BG , Leem, CS , Yu, Jaejun , Noh, TW , Kim, C , Oh, SJ , et al

Article Issue Date2008-08 View29

Silicon single-electron transistors with sidewall depletion gates and their application to dynamic single-electron transistor logic

Kim, DH , Sung, SK , Kim, Kyung Rok , Lee, JD , Park, BG , Choi, BH , Hwang, SW , Ahn, D

Article Issue Date2002-04 View15

Silicon-based field-induced band-to-band tunneling effect transistor File

Kim, Kyung Rok , Kim, DH , Song, KW , Baek, G , Kim, HH , Huh, JI , Lee, JD , Park, BG

Article Issue Date2004-06 View29

Single Electron Transistors with Sidewall Depletion Gates on a Silicon-On-Insulator Quantum Wire

Kim, DH , Kim, Kyung Rok , Sung, SK , Choi, BH , Hwang, SW , Ahn, D , Lee, JD , Park, BG

Conference Paper Issue Date2001-06-25 View26

Single-electron MOS memory with a defined quantum dot based on conventional VLSI technology File

Sung, SK , Kim, DH , Sim, JS , Kim, Kyung Rok , Lee, YK , Lee, JD , Chae, SD , Kim, BM , Park, BG

Article Issue Date2002-04 View23

Single-electron transistor based on a silicon-on-insulator quantum wire fabricated by a side-wall patterning method File

Kim, DH , Sung, SK , Sim, JS , Kim, Kyung Rok , Lee, JD , Park, BG , Choi, BH , Hwang, SW , Ahn, D

Article Issue Date2001-12 View24

Single-electron transistors based on gate-induced Si island for single-electron logic application File

Kim, DH , Sung, SK , Kim, Kyung Rok , Lee, JD , Park, BG

Article Issue Date2002-12 View27

Single-electron transistors fabricated with sidewall spacer patterning File

Park, BG , Kim, DH , Kim, Kyung Rok , Song, KW , Lee, JD

Article Issue Date2003-09 View16

Single-electron transistors with sidewall depletion gates on a silicon-on-insulator nano-wire File

Kim, Kyung Rok , Kim, DH , Sung, SK , Lee, JD , Park, BG , Choi, BH , Hwang, SW , Ahn, D

Article Issue Date2002-04 View24

Single-electron transistors with sidewall depletion gates on an SOI nanowire and their application to single-electron inverters

Kim, DH , Sung, SK , Kim, Kyung Rok , Lee, JD , Park, BG , Choi, BH , Hwang, SW , Ahn, D

Article Issue Date2002-10 View37

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