Single-electron transistors with sidewall depletion gates on an SOI nanowire and their application to single-electron inverters
Cited 6 times inCited 6 times in
- Single-electron transistors with sidewall depletion gates on an SOI nanowire and their application to single-electron inverters
- Kim, DH; Sung, SK; Kim, Kyung Rok; Lee, JD; Park, BG; Choi, BH; Hwang, SW; Ahn, D
- Depletion gate; Nanowire; Sidewall; Silicon-on-insuator; Single-electron inverter
- Issue Date
- KOREAN PHYSICAL SOC
- JOURNAL OF THE KOREAN PHYSICAL SOCIETY, v.41, no.4, pp.505 - 508
- Single-electron transistors with sidewall depletion gates on a silicon-On-insulator (SOI) nanowire are proposed and were fabricated using a combination of conventional lithography and process technology. The island-size dependence of the electrical characteristics showed good controllability. Based on the high-voltage gain and the Coulomb oscillation peak position control by the sidewall gate voltage, the basic operation of a single-electron inverter was demonstrated at 12.5 K.
- Appears in Collections:
- EE_Journal Papers
- Files in This Item:
- There are no files associated with this item.
can give you direct access to the published full text of this article. (UNISTARs only)
Show full item record
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.