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Kim, Kyung Rok
Nano-Electronic Emerging Devices Lab.
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Single-electron transistor based on a silicon-on-insulator quantum wire fabricated by a side-wall patterning method

Author(s)
Kim, DHSung, SKSim, JSKim, Kyung RokLee, JDPark, BGChoi, BHHwang, SWAhn, D
Issued Date
2001-12
DOI
10.1063/1.1421081
URI
https://scholarworks.unist.ac.kr/handle/201301/7861
Fulltext
http://www.scopus.com/inward/record.url?partnerID=HzOxMe3b&scp=0035803208
Citation
APPLIED PHYSICS LETTERS, v.79, no.23, pp.3812 - 3814
Abstract
We propose and implement a promising fabrication technology for geometrically well-defined single-electron transistors based on a silicon-on-insulator quantum wire and side-wall depletion gates. The 30-nm-wide silicon quantum wire is defined by a combination of conventional photolithography and process technology, called a side-wall patterning method, and depletion gates for two tunnel junctions are formed by the doped polycrystalline silicon sidewall. The good uniformity of the wire suppresses unexpected potential barriers. The fabricated device shows clear single-electron tunneling phenomena by an electrostatically defined single island at liquid nitrogen temperature and insensitivity of the Coulomb oscillation period to gate bias conditions.
Publisher
AMER INST PHYSICS
ISSN
0003-6951

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