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Kim, Kyung Rok (김경록)

Department: Department of Electrical Engineering(전기전자공학과)

Website: http://needs.unist.ac.kr/

Lab: Nano-Electronic Emerging Devices Lab. (차세대 나노 전자 소자 연구실)

Research Keywords: 테라헤르츠, Nano-CMOS, Neuromorphic Device, Multi-Value Logic, THz Plasma-Wave Transistor, PWT, Monolithic Transistor-Antenna, Trantenna, THz Imaging

Research Interests: Development of nano-electronic emerging devices (NEEDs) is main research focus to achieve ultra-low power peta-scale digital and RF applications in THz bandwidth. Our laboratory research about novel “beyond CMOS” devices as well as high-performance /low-power nano-CMOS for multi-valued logic and memory applications, neuromorphic devices, plasma wave transistor (PWT) THz emitter and detectors based on nano-scale structures using Si/Ge/C-based and III-V novel materials as well as nano-electronic circuit design.

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Issue Date	Title	Author(s)	Type	View	Altmetrics
2020-11	Scaling and Variation Predictions for Silicon Fin-Based High Electron Mobility Transistor	Kim, Sung-Ho; Park, Jong Yul; Chang, Jiwon, et al	ARTICLE	73	Scaling and Variation Predictions for Silicon Fin-Based High Electron Mobility Transistor
2020-09	A Logic Synthesis Methodology for Low-Power Ternary Logic Circuits	Kim, Sunmean; Lee, Sung-Yun; Park, Sunghye, et al	ARTICLE	48	A Logic Synthesis Methodology for Low-Power Ternary Logic Circuits
2020-04	Monolithic Circular Transistor-Antenna Design for High-Performance Plasmonic Millimeter-Wave Detectors	Patel, Ramesh; Ryu, Min Woo; Choe, Mun Seok, et al	ARTICLE	299	Monolithic Circular Transistor-Antenna Design for High-Performance Plasmonic Millimeter-Wave Detectors
2020-04	A multiple negative differential resistance heterojunction device and its circuit application to ternary static random access memory	Kim, Kwan-Ho; Park, Hyung-Youl; Shim, Jaewoo, et al	ARTICLE	130	A multiple negative differential resistance heterojunction device and its circuit application to ternary static random access memory
2020-01	Density-of-States-Based Physical Model for Ink-Jet Printed Thiophene Polymeric TFTs	Lee, Jiyoul; Jang, Jun Tae; Jang, Jaeman, et al	ARTICLE	266	Density-of-States-Based Physical Model for Ink-Jet Printed Thiophene Polymeric TFTs
2019-07	Tunnelling-based ternary metal–oxide–semiconductor technology	Jeong, Jae Won; Choi, Young Eun; Kim, Woo Seok, et al	ARTICLE	1121	Tunnelling-based ternary metal–oxide–semiconductor technology
2019-04	ZnO composite nanolayer with mobility edge quantization for multi-value logic transistors	Lee, Lynn; Hwang, Jeongwoon; Jung, Jin Won, et al	ARTICLE	279	ZnO composite nanolayer with mobility edge quantization for multi-value logic transistors
2018-11	Effects of Parasitic Source/Drain Junction Area on THz Responsivity of MOSFET Detector	Kim, Suna; Khan, M. Ibrahim Wasiq; Park, Dae-Woong, et al	ARTICLE	517	Effects of Parasitic Source/Drain Junction Area on THz Responsivity of MOSFET Detector
2018-10	Ternary full adder using multi-threshold voltage graphene barristors	Heo, Sunwoo; Kim, Sunmean; Kim, Kiyung, et al	ARTICLE	1334	Ternary full adder using multi-threshold voltage graphene barristors
2018-06	Low Leakage III-V/Ge CMOS FinFET Design for High-Performance Logic Applications with High-kappa Spacer Technology	Jang, Esan; Shin, Sunhae; Jeong, Jae Won, et al	ARTICLE	341	Low Leakage III-V/Ge CMOS FinFET Design for High-Performance Logic Applications with High-kappa Spacer Technology
2017-12	Highly-Sensitive Thin Film THz Detector Based on Edge Metal-Semiconductor-Metal Junction	Jeon, Youngeun; Jung, Sugnchul; Jin, Hanbyul, et al	ARTICLE	625	Highly-Sensitive Thin Film THz Detector Based on Edge Metal-Semiconductor-Metal Junction
2017-12	LF Noise Analysis for Trap Recovery in Gate Oxides Using Built-In Joule Heater	Jeon, Chang-Hoon; Kim, Choong-Ki; Park, Jun-Young, et al	ARTICLE	557	LF Noise Analysis for Trap Recovery in Gate Oxides Using Built-In Joule Heater
2016-05	Accurate Analysis and Characterization of Silicon Field Effect Transistor-Based Terahertz Wave Detector with Quasi-Plasma Two-Dimensional Electron Gas	Kim, Kwan Sung; Ryu, Min Woo; Lee, Jeong Seop, et al	ARTICLE	759	Accurate Analysis and Characterization of Silicon Field Effect Transistor-Based Terahertz Wave Detector with Quasi-Plasma Two-Dimensional Electron Gas
2016-05	Multiple Negative Differential Resistance Device by Using the Ambipolar Behavior of Tunneling Field Effect Transistor with Fast Switching Characteristics	Jeong, Jae Won; Jang, E-San; Shin, Sunhae, et al	ARTICLE	1822	Multiple Negative Differential Resistance Device by Using the Ambipolar Behavior of Tunneling Field Effect Transistor with Fast Switching Characteristics
2016-04	High-Performance Plasmonic THz Detector Based on Asymmetric FET with Vertically Integrated Antenna in CMOS Technology	Ryu, Min Woo; Lee, Jeong Seop; Kim, Kwan Sung, et al	ARTICLE	982	High-Performance Plasmonic THz Detector Based on Asymmetric FET with Vertically Integrated Antenna in CMOS Technology
2016-03	Novel five-state latch using double-peak negative differential resistance and standard ternary inverter	Shin, Sunhae; Kim, Kyung Rok	ARTICLE	664	Novel five-state latch using double-peak negative differential resistance and standard ternary inverter
2015-10	Parasitic antenna effect in terahertz plasmon detector array for real-time imaging system	Yang, Jong-Ryul; Lee, Woo-Jae; Ryu, Min Woo, et al	ARTICLE	795	Parasitic antenna effect in terahertz plasmon detector array for real-time imaging system
2015-09	실리콘 기반 플라즈마파 트랜지스터를 이용한 테라헤르츠 발진기 및 검출기	류민우; 박종율; 김경록	ARTICLE	1000
2015-08	Compact Design of Low Power Standard Ternary Inverter Based on OFF-State Current Mechanism Using Nano-CMOS Technology	Shin, Sunhae; Jang, Esan; Jeong, Jae Won, et al	ARTICLE	851	Compact Design of Low Power Standard Ternary Inverter Based on OFF-State Current Mechanism Using Nano-CMOS Technology
2015-06	Multiple negative differential resistance devices with ultra-high peak-to-valley current ratio for practical multi-valued logic and memory applications	Shin, Sunhae; Kim, Kyung Rok	ARTICLE	835	Multiple negative differential resistance devices with ultra-high peak-to-valley current ratio for practical multi-valued logic and memory applications

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