A multiple negative differential resistance heterojunction device and its circuit application to ternary static random access memory
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- A multiple negative differential resistance heterojunction device and its circuit application to ternary static random access memory
- Kim, Kwan-Ho; Park, Hyung-Youl; Shim, Jaewoo; Shin, Gicheol; Andreev, Maksim; Koo, Jiwan; Yoo, Gwangwe; Jung, Kilsu; Heo, Keun; Lee, Yoonmyung; Yu, Hyun-Yong; Kim, Kyung Rok; Cho, Jeong Ho; Lee, Sungjoo; Park, Jin-Hong
- Issue Date
- ROYAL SOC CHEMISTRY
- NANOSCALE HORIZONS, v.5, no.4, pp.654 - 662
- For increasing the restricted bit-density in the conventional binary logic system, extensive research efforts have been directed toward implementing single devices with a two threshold voltage (V-TH) characteristic via the single negative differential resistance (NDR) phenomenon. In particular, recent advances in forming van der Waals (vdW) heterostructures with two-dimensional crystals have opened up new possibilities for realizing such NDR-based tunneling devices. However, it has been challenging to exhibit three V-TH through the multiple-NDR (m-NDR) phenomenon in a single device even by using vdW heterostructures. Here, we show them-NDR device formed on a BP/(ReS2 + HfS2) type-III double-heterostructure. This m-NDR device is then integrated with a vdW transistor to demonstrate a ternary vdW latch circuit capable of storing three logic states. Finally, the ternary latch is extended toward ternary SRAM, and its high-speed write and read operations are theoretically verified.
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