A multiple negative differential resistance heterojunction device and its circuit application to ternary static random access memory

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Title
A multiple negative differential resistance heterojunction device and its circuit application to ternary static random access memory
Author
Kim, Kwan-HoPark, Hyung-YoulShim, JaewooShin, GicheolAndreev, MaksimKoo, JiwanYoo, GwangweJung, KilsuHeo, KeunLee, YoonmyungYu, Hyun-YongKim, Kyung RokCho, Jeong HoLee, SungjooPark, Jin-Hong
Issue Date
2020-04
Publisher
ROYAL SOC CHEMISTRY
Citation
NANOSCALE HORIZONS, v.5, no.4, pp.654 - 662
Abstract
For increasing the restricted bit-density in the conventional binary logic system, extensive research efforts have been directed toward implementing single devices with a two threshold voltage (V-TH) characteristic via the single negative differential resistance (NDR) phenomenon. In particular, recent advances in forming van der Waals (vdW) heterostructures with two-dimensional crystals have opened up new possibilities for realizing such NDR-based tunneling devices. However, it has been challenging to exhibit three V-TH through the multiple-NDR (m-NDR) phenomenon in a single device even by using vdW heterostructures. Here, we show them-NDR device formed on a BP/(ReS2 + HfS2) type-III double-heterostructure. This m-NDR device is then integrated with a vdW transistor to demonstrate a ternary vdW latch circuit capable of storing three logic states. Finally, the ternary latch is extended toward ternary SRAM, and its high-speed write and read operations are theoretically verified.
URI
https://scholarworks.unist.ac.kr/handle/201301/32157
URL
https://pubs.rsc.org/en/content/articlelanding/2020/NH/C9NH00631A#!divAbstract
DOI
10.1039/c9nh00631a
ISSN
2055-6756
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ECE_Journal Papers
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