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10.7 A 185fsrms-integrated-jitter and -245dB FOM PVT-robust ring-VCO-based injection-locked clock multiplier with a continuous frequency-tracking loop using a replica-delay cell and a dual-edge phase detector File

Choi, Seojin , Yoo, Seyeon , Choi, Jaehyouk

Conference Paper Issue Date2016-02-02 View17

153 fsRMS-Integrated-Jitter and 114-Multiplication Factor PVT-Robust 22.8 GHz Ring-LC-Hybrid Injection-Locked Clock Multiplier File

Choi, Seojin , Yoo, Seyeon , Lee, Yongsun , Jo, Yongwoo , Lee, Jeonghyun , Lim, Younghyun , Choi, Jaehyouk

Conference Paper Issue Date2018-06-20 View8

A -242-dB FOM and -71-dBc Reference Spur Ring-VCO-Based Ultra-Low Jitter Switched-Loop-Filter PLL Using Fast Phase-Error Correction Technique File

Seong, Taeho , Lee, Yongsun , Yoo, Seyeon , Choi, Jaehyouk

Conference Paper Issue Date2017-06-07 View5

A 0.56-2.92 GHz Wideband and Low Phase Noise Quadrature LO-Generator Using a Single LC-VCO for 2G-4G Multistandard Cellular Transceivers File

Yoon, Heein , Lee, Youngsun , Lim, Younghyun , Tak, Guemyoung , Kim, Hongdeuk , Ho, Yocheol , Choi, Jaehyouk

Article Issue Date2016-03 View12

A 0.5V-VIN, 0.29ps-Transient-FOM, and Sub-2mV-Accuracy Adaptive-Sampling Digital LDO Using Single-VCO-Based Edge-Racing Time Quantizer File

Lee, Jeonghyun , Bang, Jooeun , Lim, Younghyun , Choi, Jaehyouk

Conference Paper Issue Date2019-06-09 View11

A 122-mW Low-Power Multiresolution Spectrum-Sensing IC With Self-Deactivated Partial Swing Techniques File

Song, Taejoong , Park, Jongmin , Lee, Sang Min , Choi, Jaehyouk , Kim, Kihong , Lee, Chang-Ho , Lim, Kyutae , Laskar, Joy

Article Issue Date2010-03 View8

A 140fs rms -Jitter and -72dBc-Reference-Spur Ring-VCO-Based Injection-Locked Clock Multiplier Using a Background Triple-Point Frequency/Phase/Slope Calibrator File

Yoo, Seyeon , Choi, Seojin , Lee, Yongsun , Seong, Taeho , Lim, Younghyun , Choi, Jaehyouk

Conference Paper Issue Date2019-02-17 View9

A 2-8 GHz wideband dually frequency-tuned ring-VCO with a scalable K VCO File

Yoo, Seyeon , Kim, Jae Joon , Choi, Jaehyouk

Article Issue Date2013-11 View7

A 320μV-Output Ripple and 90ns-Settling Time at 0.5V Supply Digital-Analog-Hybrid LDO Using Multi-Level Gate-Voltage Generator and Fast-Decision PD Detector File

Lim, Younghyun , Lee, Jeonghyun , Lee, Yongsun , Yoo, Seyeon , Choi, Jaehyouk

Conference Paper Issue Date2018-09-03 View6

A 450-fs jitter PVT-robust fractional-resolution injection-locked clock multiplier using a DLL-based calibrator with replica-delay-cells File

Kim, Mina , Choi, Seojin , Choi, Jaehyouk

Conference Paper Issue Date2015-06-18 View11

A 65-nm CMOS 2 x 2 MIMO Multi-Band LTE RF Transceiver for Small Cell Base Stations File

Lim, Kyoohyun , Lee, Sanghoon , Lee, Yongha , Moon, Byeongmoo , Shin, Hwahyeong , Kang, Kisub , Kim, Sungbeom , Lee, Jihyeok , Lee, Hyungsuk , Shim, Hyunchul , et al

Article Issue Date2018-07 View10

A 65nm CMOS current controlled oscillator with high tuning linearity for wideband polar modulation File

Choi, Jaehyouk , Hu, Jianyun , Leung, L , Narathong, C , Park, Jongmin , Sahota, K

Conference Paper Issue Date2012-09-10 View12

A 76fs rms Jitter and -40dBc Integrated-Phase-Noise 28-to-31GHz Frequency Synthesizer Based on Digital Sub-Sampling PLL Using Optimally Spaced Voltage Comparators and Background Loop-Gain Optimization File

Kim, Juyeop , Yoon, Heein , Lim, Younghyun , Lee, Yongsun , Cho, Yoonseo , Seong, Taeho , Choi, Jaehyouk

Conference Paper Issue Date2019-02-17 View13

A CMOS highly linear hybrid current/voltage controlled oscillator for wideband polar modulation File

Tang, Yiwu , Hu, Jianyun , Park, Jongmin , Choi, Jaehyouk , Leung, Lincoln , Narathong, Chiewcharn , Sahota, Kamal

Article Issue Date2013-08 View13

A Fully Integrated Dual-Mode CMOS Power Amplifier With an Autotransformer-Based Parallel Combining Transformer File

Ahn, Hyunjin , Baek, Seungjun , Ilku Nam , An, Deokgi , Lee, Jae Kyung , Jeong, Minsu , Kim, Bo-Eun , Choi, Jaehyouk , Lee, Ockgoo

Article Issue Date2017-09 View8

A Low Phase Noise Injection-Locked Programmable Reference Clock Multiplier with a Two-Phase PVT-Calibrator for ΔΣ PLLs File

Lee, Yongsun , Kim, Mina , Seong, Taeho , Choi, Jaehyouk

Article Issue Date2015-03 View8

A Low Power and Wide Range Programmable Clock Generator With a High Multiplication Factor File

Choi, Jaehyouk , Kim, Stephen T. , Kim, Woonyun , Kim, Kwan-Woo , Lim, Kyutae , Laskar, Joy

Article Issue Date2011-04 View8

A Low-Integrated-Phase-Noise 27-30-GHz Injection-Locked Frequency Multiplier With an Ultra-Low-Power Frequency-Tracking Loop for mm-Wave-Band 5G Transceivers File

Yoo, Seyeon , Choi, Seojin , Kim, Juyeop , Yoon, Heein , Lee, Yongsun , Choi, Jaehyouk

Article Issue Date2018-02 View15

A Low-Jitter and Fractional-Resolution Injection-Locked Clock Multiplier Using a DLL-Based Real-time PVT-Calibrator with Replica-Delay Cells File

Kim, Mina , Choi, Seojin , Seong, Taeho , Choi, Jaehyouk

Article Issue Date2016-02 View6

A Low-Jitter and Low-Reference-Spur Ring-VCO-Based Switched-Loop Filter PLL Using a Fast Phase-Error Correction Technique File

Lee, Yongsun , Seong, Taeho , Yoo, Seyeon , Choi, Jaehyouk

Article Issue Date2018-04 View5

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