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Lee, Jongeun (이종은)

Department
Department of Electrical Engineering(전기전자공학과)
Website
http://ecl.unist.ac.kr/
Lab
Intelligent Computing and Codesign Lab. (지능형 컴퓨팅 및 통합설계 연구실)
Research Keywords
Deep learning processor architecture, Quantization, Energy efficiency, Reconfigurable architecture, Compilers
Research Interests
Our research area is co-design of hardware and software for optimizing cost, performance, power, and energy of emerging computer systems. Examples of such systems include AI (Artificial Intelligence) processors and Systems-on-Chips (SoCs) for media and signal processing applications.
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Issue DateTitleAuthor(s)TypeViewAltmetrics
2020-06RRNet: Repetition-Reduction Network for Energy Efficient Depth EstimationOh, Sangyun; Kim, Hye-Jin S.; Lee, Jongeun, et alARTICLE69 RRNet: Repetition-Reduction Network for Energy Efficient Depth Estimation
2019-09Cost-effective stochastic MAC circuits for deep neural networksSim, Hyeonuk; Lee, JongeunARTICLE182 Cost-effective stochastic MAC circuits for deep neural networks
2019-07Mask Technique for Fast and Efficient Training of Binary Resistive Crossbar ArraysFouda, Mohammed E.; Lee, Sugil; Lee, Jongeun, et alARTICLE201 Mask Technique for Fast and Efficient Training of Binary Resistive Crossbar Arrays
2019-05Double MAC on a DSP: Boosting the Performance of Convolutional Neural Networks on FPGAsLee, Sugil; Kim, Daewoo; Nguyen, Dong, et alARTICLE426 Double MAC on a DSP: Boosting the Performance of Convolutional Neural Networks on FPGAs
2018-12An Efficient and Accurate Stochastic Number Generator Using Even-distribution CodingZhakatayev, Aidyn; Kim, Kyounghoon; Choi, Kiyoung, et alARTICLE472 An Efficient and Accurate Stochastic Number Generator Using Even-distribution Coding
2017-12Efficient Execution of Stream Graphs on Coarse-Grained Reconfigurable ArchitecturesOh, Sangyun; Lee, Hongsik; Lee, JongeunARTICLE517 Efficient Execution of Stream Graphs on Coarse-Grained Reconfigurable Architectures
2016-08Efficient High-Level Synthesis for Nested Loops of Nonrectangular Iteration SpacesSim, Hyeonuk; Rahman, Atul; Lee, JongeunARTICLE443 Efficient High-Level Synthesis for Nested Loops of Nonrectangular Iteration Spaces
2016-07Mapping imperfect loops to coarse-grained reconfigurable architecturesSim, Hyeonuk; Lee, Hongsik; Seo, Seongseok, et alARTICLE762 Mapping imperfect loops to coarse-grained reconfigurable architectures
2015-12Scalable application mapping for SIMD reconfigurable architectureKim, Yongjoo; Lee, Jongeun; Lee, Jinyong, et alARTICLE623 Scalable application mapping for SIMD reconfigurable architecture
2014-05Improving performance of loops on DIAM-based VLIW architecturesLee, Jinyong; Lee, Jongwon; Paek, Yunheung, et alARTICLE688 Improving performance of loops on DIAM-based VLIW architectures
2014-03Configurable range memory for effective data reuse on programmable acceleratorsLee, Jongeun; Seo, Seongseok; Paek, Jongkyung, et alARTICLE685 Configurable range memory for effective data reuse on programmable accelerators
2014-02Design and optimization for embedded and real-time computing systems and applicationsLee, Jongeun; Goddard, Steve; Kuo, Chin-FuARTICLE686 Design and optimization for embedded and real-time computing systems and applications
2013-12Evaluator-executor transformation for efficient pipelining of loops with conditionalsJeong, Yeonghun; Seo, Seongseok; Lee, JongeunARTICLE622 Evaluator-executor transformation for efficient pipelining of loops with conditionals
2013-11Software-based register file vulnerability reduction for embedded processorsLee, Jongeun; Shrivastava, AviralARTICLE592 Software-based register file vulnerability reduction for embedded processors
2013-10Architecture Customization of On-Chip Reconfigurable AcceleratorsYoon, Jonghee W.; Lee, Jongeun; Park, Sanghyun, et alARTICLE587 Architecture Customization of On-Chip Reconfigurable Accelerators
2012-07Return Data Interleaving for Multi-Channel Embedded CMPs SystemsHong, Fei; Shrivastava, Aviral; Lee, JongeunARTICLE685 Return Data Interleaving for Multi-Channel Embedded CMPs Systems
2012-07PICA: Processor Idle Cycle Aggregation for Energy-Efficient Embedded SystemsLee, Jongeun; Shrivastava, AviralARTICLE626 PICA: Processor Idle Cycle Aggregation for Energy-Efficient Embedded Systems
2012-01Improving Performance of Nested Loops on Reconfigurable Array ProcessorsKim, Yongjoo; Lee, Jongeun; Mai, Toan X., et alARTICLE625 Improving Performance of Nested Loops on Reconfigurable Array Processors
2011-11High Throughput Data Mapping for Coarse-Grained Reconfigurable ArchitecturesKim, Yongjoo; Lee, Jongeun; Shrivastava, Aviral, et alARTICLE620 High Throughput Data Mapping for Coarse-Grained Reconfigurable Architectures
2011-10Memory Access Optimization in Compilation for Coarse-Grained Reconfigurable ArchitecturesKim, Yongjoo; Lee, Jongeun; Shrivastava, Aviral, et alARTICLE705 Memory Access Optimization in Compilation for Coarse-Grained Reconfigurable Architectures

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