사진

  • ResearcherID
  • Scopus
  • Google Citations

Lee, Jongeun (이종은)

Department
School of Electrical and Computer Engineering(전기전자컴퓨터공학부)
Research Interests
Reconfigurable processor architecture, neuromorphic processor, stochastic computing
Lab
Renew: Reconfigurable and Neuromorphic Computing Lab
Website
http://ecl.unist.ac.kr/
This table browses all dspace content
Issue DateTitleAuthor(s)TypeViewAltmetrics
2019-09Cost-effective stochastic MAC circuits for deep neural networksSim, Hyeonuk; Lee, JongeunARTICLE5 Cost-effective stochastic MAC circuits for deep neural networks
2019-07Mask Technique for Fast and Efficient Training of Binary Resistive Crossbar ArraysFouda, Mohammed E.; Lee, Sugil; Lee, Jongeun, et alARTICLE12 Mask Technique for Fast and Efficient Training of Binary Resistive Crossbar Arrays
2019-05Double MAC on a DSP: Boosting the Performance of Convolutional Neural Networks on FPGAsLee, Sugil; Kim, Daewoo; Nguyen, Dong, et alARTICLE204 Double MAC on a DSP: Boosting the Performance of Convolutional Neural Networks on FPGAs
2018-12An Efficient and Accurate Stochastic Number Generator Using Even-distribution CodingZhakatayev, Aidyn; Kim, Kyounghoon; Choi, Kiyoung, et alARTICLE246 An Efficient and Accurate Stochastic Number Generator Using Even-distribution Coding
2017-12Efficient Execution of Stream Graphs on Coarse-Grained Reconfigurable ArchitecturesOh, Sangyun; Lee, Hongsik; Lee, JongeunARTICLE315 Efficient Execution of Stream Graphs on Coarse-Grained Reconfigurable Architectures
2016-08Efficient High-Level Synthesis for Nested Loops of Nonrectangular Iteration SpacesSim, Hyeonuk; Rahman, Atul; Lee, JongeunARTICLE276 Efficient High-Level Synthesis for Nested Loops of Nonrectangular Iteration Spaces
2016-07Mapping imperfect loops to coarse-grained reconfigurable architecturesSim, Hyeonuk; Lee, Hongsik; Seo, Seongseok, et alARTICLE584 Mapping imperfect loops to coarse-grained reconfigurable architectures
2015-12Scalable application mapping for SIMD reconfigurable architectureKim, Yongjoo; Lee, Jongeun; Lee, Jinyong, et alARTICLE439 Scalable application mapping for SIMD reconfigurable architecture
2014-05Improving performance of loops on DIAM-based VLIW architecturesLee, Jinyong; Lee, Jongwon; Paek, Yunheung, et alARTICLE512 Improving performance of loops on DIAM-based VLIW architectures
2014-03Configurable range memory for effective data reuse on programmable acceleratorsLee, Jongeun; Seo, Seongseok; Paek, Jongkyung, et alARTICLE506 Configurable range memory for effective data reuse on programmable accelerators
2014-02Design and optimization for embedded and real-time computing systems and applicationsLee, Jongeun; Goddard, Steve; Kuo, Chin-FuARTICLE529 Design and optimization for embedded and real-time computing systems and applications
2013-12Evaluator-executor transformation for efficient pipelining of loops with conditionalsJeong, Yeonghun; Seo, Seongseok; Lee, JongeunARTICLE496 Evaluator-executor transformation for efficient pipelining of loops with conditionals
2013-11Software-based register file vulnerability reduction for embedded processorsLee, Jongeun; Shrivastava, AviralARTICLE454 Software-based register file vulnerability reduction for embedded processors
2013-10Architecture Customization of On-Chip Reconfigurable AcceleratorsYoon, Jonghee W.; Lee, Jongeun; Park, Sanghyun, et alARTICLE427 Architecture Customization of On-Chip Reconfigurable Accelerators
2012-07Return Data Interleaving for Multi-Channel Embedded CMPs SystemsHong, Fei; Shrivastava, Aviral; Lee, JongeunARTICLE548 Return Data Interleaving for Multi-Channel Embedded CMPs Systems
2012-07PICA: Processor Idle Cycle Aggregation for Energy-Efficient Embedded SystemsLee, Jongeun; Shrivastava, AviralARTICLE479 PICA: Processor Idle Cycle Aggregation for Energy-Efficient Embedded Systems
2012-01Improving Performance of Nested Loops on Reconfigurable Array ProcessorsKim, Yongjoo; Lee, Jongeun; Mai, Toan X., et alARTICLE477 Improving Performance of Nested Loops on Reconfigurable Array Processors
2011-11High Throughput Data Mapping for Coarse-Grained Reconfigurable ArchitecturesKim, Yongjoo; Lee, Jongeun; Shrivastava, Aviral, et alARTICLE478 High Throughput Data Mapping for Coarse-Grained Reconfigurable Architectures
2011-10Memory Access Optimization in Compilation for Coarse-Grained Reconfigurable ArchitecturesKim, Yongjoo; Lee, Jongeun; Shrivastava, Aviral, et alARTICLE540 Memory Access Optimization in Compilation for Coarse-Grained Reconfigurable Architectures
2011-05Fast graph-based instruction selection for multi-output instructionsYoun, Jonghee M.; Lee, Jongwon; Paek, Yunheung, et alARTICLE496 Fast graph-based instruction selection for multi-output instructions

MENU