| 2019-09 | Cost-effective stochastic MAC circuits for deep neural networks | Sim, Hyeonuk; Lee, Jongeun | ARTICLE | 5 |
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| 2019-07 | Mask Technique for Fast and Efficient Training of Binary Resistive Crossbar Arrays | Fouda, Mohammed E.; Lee, Sugil; Lee, Jongeun, et al | ARTICLE | 12 |
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| 2019-05 | Double MAC on a DSP: Boosting the Performance of Convolutional Neural Networks on FPGAs | Lee, Sugil; Kim, Daewoo; Nguyen, Dong, et al | ARTICLE | 204 |
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| 2018-12 | An Efficient and Accurate Stochastic Number Generator Using Even-distribution Coding | Zhakatayev, Aidyn; Kim, Kyounghoon; Choi, Kiyoung, et al | ARTICLE | 246 |
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| 2017-12 | Efficient Execution of Stream Graphs on Coarse-Grained Reconfigurable Architectures | Oh, Sangyun; Lee, Hongsik; Lee, Jongeun | ARTICLE | 315 |
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| 2016-08 | Efficient High-Level Synthesis for Nested Loops of Nonrectangular Iteration Spaces | Sim, Hyeonuk; Rahman, Atul; Lee, Jongeun | ARTICLE | 276 |
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| 2016-07 | Mapping imperfect loops to coarse-grained reconfigurable architectures | Sim, Hyeonuk; Lee, Hongsik; Seo, Seongseok, et al | ARTICLE | 584 |
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| 2015-12 | Scalable application mapping for SIMD reconfigurable architecture | Kim, Yongjoo; Lee, Jongeun; Lee, Jinyong, et al | ARTICLE | 439 |
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| 2014-05 | Improving performance of loops on DIAM-based VLIW architectures | Lee, Jinyong; Lee, Jongwon; Paek, Yunheung, et al | ARTICLE | 512 |
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| 2014-03 | Configurable range memory for effective data reuse on programmable accelerators | Lee, Jongeun; Seo, Seongseok; Paek, Jongkyung, et al | ARTICLE | 506 |
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| 2014-02 | Design and optimization for embedded and real-time computing systems and applications | Lee, Jongeun; Goddard, Steve; Kuo, Chin-Fu | ARTICLE | 529 |
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| 2013-12 | Evaluator-executor transformation for efficient pipelining of loops with conditionals | Jeong, Yeonghun; Seo, Seongseok; Lee, Jongeun | ARTICLE | 496 |
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| 2013-11 | Software-based register file vulnerability reduction for embedded processors | Lee, Jongeun; Shrivastava, Aviral | ARTICLE | 454 |
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| 2013-10 | Architecture Customization of On-Chip Reconfigurable Accelerators | Yoon, Jonghee W.; Lee, Jongeun; Park, Sanghyun, et al | ARTICLE | 427 |
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| 2012-07 | Return Data Interleaving for Multi-Channel Embedded CMPs Systems | Hong, Fei; Shrivastava, Aviral; Lee, Jongeun | ARTICLE | 548 |
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| 2012-07 | PICA: Processor Idle Cycle Aggregation for Energy-Efficient Embedded Systems | Lee, Jongeun; Shrivastava, Aviral | ARTICLE | 479 |
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| 2012-01 | Improving Performance of Nested Loops on Reconfigurable Array Processors | Kim, Yongjoo; Lee, Jongeun; Mai, Toan X., et al | ARTICLE | 477 |
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| 2011-11 | High Throughput Data Mapping for Coarse-Grained Reconfigurable Architectures | Kim, Yongjoo; Lee, Jongeun; Shrivastava, Aviral, et al | ARTICLE | 478 |
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| 2011-10 | Memory Access Optimization in Compilation for Coarse-Grained Reconfigurable Architectures | Kim, Yongjoo; Lee, Jongeun; Shrivastava, Aviral, et al | ARTICLE | 540 |
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| 2011-05 | Fast graph-based instruction selection for multi-output instructions | Youn, Jonghee M.; Lee, Jongwon; Paek, Yunheung, et al | ARTICLE | 496 |
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