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Lee, Jongeun
Renew: Reconfigurable and Neuromorphic Computing Lab
Research Interests
  • Reconfigurable processor architecture, neuromorphic processor, stochastic computing

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Scalable application mapping for SIMD reconfigurable architecture

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Title
Scalable application mapping for SIMD reconfigurable architecture
Author
Kim, YongjooLee, JongeunLee, JinyongPaek, Yunheung
Issue Date
2015-12
Publisher
IEEK PUBLICATION CENTER
Citation
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, v.15, no.6, pp.634 - 646
Abstract
Coarse-Grained Reconfigurable Architecture (CGRA) is a very promising platform that provides fast turn-around-time as well as very high energy efficiency for multimedia applications. One of the problems with CGRAs, however, is application mapping, which currently does not scale well with geometrically increasing numbers of cores. To mitigate the scalability problem, this paper discusses how to use the SIMD (Single Instruction Multiple Data) paradigm for CGRAs. While the idea of SIMD is not new, SIMD can complicate the mapping problem by adding an additional dimension of iteration mapping to the already complex problem of operation and data mapping, which are all interdependent, and can thus significantly affect performance through memory bank conflicts. In this paper, based on a new architecture called SIMD reconfigurable architecture, which allows SIMD execution at multiple levels of granularity, we present how to minimize bank conflicts considering all three related sub-problems, for various RA organizations. We also present data tiling and evaluate a conflictfree scheduling algorithm as a way to eliminate bank conflicts for a certain class of mapping problem.
URI
https://scholarworks.unist.ac.kr/handle/201301/18042
URL
http://www.dbpia.co.kr/openurl/?vol=15&page=634&issn=1598-1657&issue=6&year=2015
DOI
10.5573/JSTS.2015.15.6.634
ISSN
1598-1657
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