Ge(110) GAA Nanosheet / Si(100) Tri-gate Nanosheet Monolithic CFETs Featuring Record-High Hole Mobility

Abstract

In this study, we demonstrated heterogeneous 3D monolithic CFETs (mCFETs) by utilizing Ge (110)/<110> gate-all-around (GAA) nanosheet p-FETs as the top-tier transistors and Si (100)/<110> tri-gate n-FETs as the bottom-tier transistors. By minimizing the mobility difference between electrons and holes through this transport combination of heterogeneous channels, we demonstrated its potential for the next-generation logic. Notably, we achieved a record-high hole mobility of 1200 cm2/V.s (normalized by footprint to account CFET drivability) in the Ge (110)/<110> GAA nanosheet p-FETs with flat top and bottom surfaces. These channels were successfully employed in heterogeneous mCFETs to see the feasibility for high-performance logic devices.