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Kim, Jingook
Integrated Circuit and Electromagnetic Compatibility Laboratory (IC & EMC Lab)
Research Interests
  • Convergence between circuit and EM domains

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Analytical Calculation of Jitter Probability Density at Multistage Output Buffers Due to Supply Voltage Fluctuations

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Title
Analytical Calculation of Jitter Probability Density at Multistage Output Buffers Due to Supply Voltage Fluctuations
Author
Park, EunkyeongKim, HyungsooShim, JongjooKim, Yong-JuKim, Yun-SaingKim, Jingook
Issue Date
2015-08
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Citation
IEEE TRANSACTIONS ON ELECTROMAGNETIC COMPATIBILITY, v.57, no.4, pp.796 - 806
Abstract
The jitter probability density function (PDF) at multistage output buffers due to supply voltage fluctuations is analytically derived. For experimental validation, an integrated circuit (IC) is designed, fabricated, and assembled in a printed circuit board (PCB). The on-chip supply voltage fluctuations are extracted from the simultaneous measurements at the pads on IC and PCB and used to calculate the jitter PDF of the multistage buffers. Also, characteristics of the output channels are measured and modeled with the separately designed channel pattern. Finally, the jitter PDFs for multistage buffers are calculated and compared with the measured jitter histograms
URI
https://scholarworks.unist.ac.kr/handle/201301/11846
URL
http://ieeexplore.ieee.org/xpl/articleDetails.jsp?reload=true&arnumber=7054512
DOI
10.1109/TEMC.2015.2403294
ISSN
0018-9375
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