| 2016-02-02 | 10.7 A 185fsrms-integrated-jitter and -245dB FOM PVT-robust ring-VCO-based injection-locked clock multiplier with a continuous frequency-tracking loop using a replica-delay cell and a dual-edge phase detector | Choi, Seojin; Yoo, Seyeon; Choi, Jaehyouk | CONFERENCE | 492 |
| 2018-06-20 | 153 fsRMS-Integrated-Jitter and 114-Multiplication Factor PVT-Robust 22.8 GHz Ring-LC-Hybrid Injection-Locked Clock Multiplier | Choi, Seojin; Yoo, Seyeon; Lee, Yongsun; Jo, Yongwoo; Lee, Jeonghyun; Lim, Younghyun; Choi, Jaehyouk | CONFERENCE | 371 |
| 2019-02-17 | 30.9 A 140fs rms -Jitter and -72dBc-Reference-Spur Ring-VCO-Based Injection-Locked Clock Multiplier Using a Background Triple-Point Frequency/Phase/Slope Calibrator | Yoo, Seyeon; Choi, Seojin; Lee, Yongsun; Seong, Taeho; Lim, Younghyun; Choi, Jaehyouk | CONFERENCE | 415 |
| 2017-06-07 | A -242-dB FOM and -71-dBc Reference Spur Ring-VCO-Based Ultra-Low Jitter Switched-Loop-Filter PLL Using Fast Phase-Error Correction Technique | Seong, Taeho; Lee, Yongsun; Yoo, Seyeon; Choi, Jaehyouk | CONFERENCE | 299 |
| 2020-02-16 | A 170MHz-Lock-In-Range and −253dB-FoMjitter 12-to-14.5GHz Subsampling PLL with a 150µW Frequency-Disturbance-Correcting Loop Using a Low-Power Unevenly Spaced Edge Generator | Lim, Younghyun; Kim, Juyeop; Jo, Yongwoo; Bang, Jooeun; Yoo, Seyeon; Park, Hangi; Yoon, Heein; Choi, Jaehyouk | CONFERENCE | 380 |
| 2013-11 | A 2-8 GHz wideband dually frequency-tuned ring-VCO with a scalable K VCO | Yoo, Seyeon; Kim, Jae Joon; Choi, Jaehyouk | ARTICLE | 1336 |
| 2018-09-03 | A 320μV-Output Ripple and 90ns-Settling Time at 0.5V Supply Digital-Analog-Hybrid LDO Using Multi-Level Gate-Voltage Generator and Fast-Decision PD Detector | Lim, Younghyun; Lee, Jeonghyun; Lee, Yongsun; Yoo, Seyeon; Choi, Jaehyouk | CONFERENCE | 286 |
| 2018-02 | A Low-Integrated-Phase-Noise 27-30-GHz Injection-Locked Frequency Multiplier With an Ultra-Low-Power Frequency-Tracking Loop for mm-Wave-Band 5G Transceivers | Yoo, Seyeon; Choi, Seojin; Kim, Juyeop; Yoon, Heein; Lee, Yongsun; Choi, Jaehyouk | ARTICLE | 903 |
| 2018-04 | A Low-Jitter and Low-Reference-Spur Ring-VCO-Based Switched-Loop Filter PLL Using a Fast Phase-Error Correction Technique | Lee, Yongsun; Seong, Taeho; Yoo, Seyeon; Choi, Jaehyouk | ARTICLE | 923 |
| 2017-02-08 | A PVT-Robust -39dBc 1kHz-to-100MHz Integrated-Phase-Noise 29GHz Injection-Locked Frequency Multiplier with a 600μW Frequency-Tracking Loop Using the Averages of Phase Deviations for mm-Band 5G Transceivers | Yoo, Seyeon; Choi, Seojin; Kim, Juyeop; Yoon, Heein; Lee, Yongsun; Choi, Jaehyouk | CONFERENCE | 375 |
| 2016-08 | A PVT-Robust and Low-Jitter Ring-VCO-Based Injection-Locked Clock Multiplier with a Continuous Frequency-Tracking Loop Using a Replica-Delay Cell and a Dual-Edge Phase Detector | Choi, Seojin; Yoo, Seyeon; Lim, Younghyun; Choi, Jaehyouk | ARTICLE | 1247 |
| 2018-01-22 | A switched-loop-filter PLL with fast phase-error correction technique | Lee, Yongsun; Seong, Taeho; Yoo, Seyeon; Choi, Jaehyouk | CONFERENCE | 269 |
| 2018-02-14 | A −242dB FOM and −75dBc-reference-spur ring-DCO-based all-digital PLL using a fast phase-error correction technique and a low-power optimal-threshold TDC | Seong, Taeho; Lee, Yongsun; Yoo, Seyeon; Choi, Jaehyouk | CONFERENCE | 374 |
| 2016-02 | An Ultra-Low Power and Compact LC-Tank-Based Frequency Tripler Using Pulsed Input Signals | Yoo, Seyeon; Choi, Seojin; Choi, Jaehyouk | ARTICLE | 1366 |
| 2019-04 | An Ultra-Low-Jitter 22.8-GHz Ring-LC-Hybrid Injection-Locked Clock Multiplier With a Multiplication Factor of 114 | Choi, Seojin; Yoo, Seyeon; Lee, Yongsun; Jo, Yongwoo; Lee, Jeongyun; Lim, Younghyun; Choi, Jaehyouk | ARTICLE | 640 |
| 2018-01-22 | Injection-locked frequency multiplier with a continuous frequency-tracking loop for 5G transceivers | Yoo, Seyeon; Choi, Seojin; Kim, Juyeop; Yoon, Heein; Lee, Yongsun; Choi, Jaehyouk | CONFERENCE | 313 |
| 2020-02 | Self-Calibrated, Low-Jitter and Low-Reference-Spur Injection-Locked Clock Multipliers | Lee, Kyuho; Yoo, Seyeon | Doctoral thesis | 705 |
