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10.7 A 185fsrms-integrated-jitter and -245dB FOM PVT-robust ring-VCO-based injection-locked clock multiplier with a continuous frequency-tracking loop using a replica-delay cell and a dual-edge phase detector File

Choi, Seojin , Yoo, Seyeon , Choi, Jaehyouk

Conference Paper Issue Date2016-02-02 View25

153 fsRMS-Integrated-Jitter and 114-Multiplication Factor PVT-Robust 22.8 GHz Ring-LC-Hybrid Injection-Locked Clock Multiplier File

Choi, Seojin , Yoo, Seyeon , Lee, Yongsun , Jo, Yongwoo , Lee, Jeonghyun , Lim, Younghyun , Choi, Jaehyouk

Conference Paper Issue Date2018-06-20 View13

A -242-dB FOM and -71-dBc Reference Spur Ring-VCO-Based Ultra-Low Jitter Switched-Loop-Filter PLL Using Fast Phase-Error Correction Technique File

Seong, Taeho , Lee, Yongsun , Yoo, Seyeon , Choi, Jaehyouk

Conference Paper Issue Date2017-06-07 View12

A 0.1-1.5-GHz Wide Harmonic-Locking-Free Delay-Locked Loop Using an Exponential DAC File

Park, Suneui , Kim, Juyeop , Hwang, Chanwoong , Park, Hangi , Yoo, Seyeon , Seong, Taeho , Choi, Jaehyouk

Article Issue Date2019-08 View21

A 140fs rms -Jitter and -72dBc-Reference-Spur Ring-VCO-Based Injection-Locked Clock Multiplier Using a Background Triple-Point Frequency/Phase/Slope Calibrator File

Yoo, Seyeon , Choi, Seojin , Lee, Yongsun , Seong, Taeho , Lim, Younghyun , Choi, Jaehyouk

Conference Paper Issue Date2019-02-17 View20

A 170MHz-Lock-In-Range and −253dB-FoMjitter 12-to-14.5GHz Subsampling PLL with a 150µW Frequency-Disturbance-Correcting Loop Using a Low-Power Unevenly Spaced Edge Generator File

Lim, Younghyun , Kim, Juyeop , Jo, Yongwoo , Bang, Jooeun , Yoo, Seyeon , Park, Hangi , Yoon, Heein , Choi, Jaehyouk

Conference Paper Issue Date2020-02-16 View25

A 2-8 GHz wideband dually frequency-tuned ring-VCO with a scalable K VCO File

Yoo, Seyeon , Kim, Jae Joon , Choi, Jaehyouk

Article Issue Date2013-11 View12

A 320-fs RMS Jitter and-75-dBc Reference-Spur Ring-DCO-Based Digital PLL Using an Optimal-Threshold TDC File

Seong, Taeho , Lee, Yongsun , Yoo, Seyeon , Choi, Jaehyouk

Article Issue Date2019-09 View23

A 320μV-Output Ripple and 90ns-Settling Time at 0.5V Supply Digital-Analog-Hybrid LDO Using Multi-Level Gate-Voltage Generator and Fast-Decision PD Detector File

Lim, Younghyun , Lee, Jeonghyun , Lee, Yongsun , Yoo, Seyeon , Choi, Jaehyouk

Conference Paper Issue Date2018-09-03 View10

A Low-Integrated-Phase-Noise 27-30-GHz Injection-Locked Frequency Multiplier With an Ultra-Low-Power Frequency-Tracking Loop for mm-Wave-Band 5G Transceivers File

Yoo, Seyeon , Choi, Seojin , Kim, Juyeop , Yoon, Heein , Lee, Yongsun , Choi, Jaehyouk

Article Issue Date2018-02 View22

A Low-Jitter and Low-Reference-Spur Ring-VCO- Based Injection-Locked Clock Multiplier Using a Triple-Point Background Calibrator File

Yoo, Seyeon , Choi, Seojin , Lee, Yongsun , Seong, Taeho , Lim, Younghyun , Choi, Jaehyouk

Article Issue Date2021-01 View8

A Low-Jitter and Low-Reference-Spur Ring-VCO-Based Switched-Loop Filter PLL Using a Fast Phase-Error Correction Technique File

Lee, Yongsun , Seong, Taeho , Yoo, Seyeon , Choi, Jaehyouk

Article Issue Date2018-04 View10

A PVT-Robust -39dBc 1kHz-to-100MHz Integrated-Phase-Noise 29GHz Injection-Locked Frequency Multiplier with a 600μW Frequency-Tracking Loop Using the Averages of Phase Deviations for mm-Band 5G Transceivers File

Yoo, Seyeon , Choi, Seojin , Kim, Juyeop , Yoon, Heein , Lee, Yongsun , Choi, Jaehyouk

Conference Paper Issue Date2017-02-08 View11

A PVT-Robust and Low-Jitter Ring-VCO-Based Injection-Locked Clock Multiplier with a Continuous Frequency-Tracking Loop Using a Replica-Delay Cell and a Dual-Edge Phase Detector File

Choi, Seojin , Yoo, Seyeon , Lim, Younghyun , Choi, Jaehyouk

Article Issue Date2016-08 View17

A switched-loop-filter PLL with fast phase-error correction technique File

Lee, Yongsun , Seong, Taeho , Yoo, Seyeon , Choi, Jaehyouk

Conference Paper Issue Date2018-01-22 View15

A −242dB FOM and −75dBc-reference-spur ring-DCO-based all-digital PLL using a fast phase-error correction technique and a low-power optimal-threshold TDC File

Seong, Taeho , Lee, Yongsun , Yoo, Seyeon , Choi, Jaehyouk

Conference Paper Issue Date2018-02-14 View16

An Ultra-Low Power and Compact LC-Tank-Based Frequency Tripler Using Pulsed Input Signals File

Yoo, Seyeon , Choi, Seojin , Choi, Jaehyouk

Article Issue Date2016-02 View15

An Ultra-Low-Jitter 22.8-GHz Ring-LC-Hybrid Injection-Locked Clock Multiplier With a Multiplication Factor of 114 File

Choi, Seojin , Yoo, Seyeon , Lee, Yongsun , Jo, Yongwoo , Lee, Jeongyun , Lim, Younghyun , Choi, Jaehyouk

Article Issue Date2019-04 View14

Injection-locked frequency multiplier with a continuous frequency-tracking loop for 5G transceivers File

Yoo, Seyeon , Choi, Seojin , Kim, Juyeop , Yoon, Heein , Lee, Yongsun , Choi, Jaehyouk

Conference Paper Issue Date2018-01-22 View17

Self-Calibrated, Low-Jitter and Low-Reference-Spur Injection-Locked Clock Multipliers File

Yoo, Seyeon

Thesis Issue Date2020-02 View25

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