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Browsing by Author : Drewniak, James L.

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Showing results 3 to 9 of 9

Design Criteria and Error Sensitivity of Time-Domain Channel Characterization (TCC) for Asymmetry Fixture De-Embedding File

Yoon, Changwook , Tsiklauri, Mikheil , Zvonkin, Mikhail , Chen, Qinghua Bill , Aflaki, Aman , Kim, Jingook , Fan, Jun , Drewniak, James L.

Article Issue Date2015-08 View9
Equivalent circuit model for power bus design in multi-layer PCBs with via arrays File

Kim, Jingook , Shringarpure, Ketan , Fan, Jun , Kim, Joungho , Drewniak, James L.

Article Issue Date2011-02 View10
Extraction of equivalent inductance in package-PCB hierarchical power distribution network File

Kim, Jingook , Kim, Jaemin , Ren, Liehui , Fan, Jun , Kim, Joungho , Drewniak, James L.

Conference Paper Issue Date2009-10-19 View10
Formulation and Network Model Reduction for Analysis of the Power Distribution Network in a Production-Level Multilayered Printed Circuit Board File

Shringarpure, Ketan , Pan, Siming , Kim, Jingook , Fan, Jun , Achkir, Brice , Archambeault, Bruce , Drewniak, James L.

Article Issue Date2016-06 View9
Inductance Calculations for Plane-Pair Area Fills With Vias in a Power Distribution Network Using a Cavity Model and Partial Inductances File

Kim, Jingook , Fan, Jun , Ruehli, Albert E. , Kim, Joungho , Drewniak, James L.

Article Issue Date2011-08 View6
Innovative PDN design guidelines for practical high layer-count PCBs

Shringarpure, Ketan , Pan, Siming , Kim, Jingook , Achkir, Brice , Archambeault, Bruce , Fan, Jun , Drewniak, James L.

Conference Paper Issue Date2013-01-28 View10
Sensitivity Analysis of a Circuit Model for Power Distribution Network in a Multilayered Printed Circuit Board File

Shringarpure, Ketan , Pan, Siming , Kim, Jingook , Fan, Jun , Achkir, Brice , Archambeault, Bruce , Drewniak, James L.

Article Issue Date2017-12 View14
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