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Role of Inter-Layer Dielectric on the Electrical and Heat Dissipation Characteristics in the Heterogeneous 3D Sequential CFETs with Ge p-FETs on Si n-FETs

Author(s)
Kim, Seong KwangLim, Hyeong-RakShim, JoonsupBaek, WoojinKim, SeonghoPark, YoungkeunJeong, JaejoongLim, JinhaKim, Joon PyoJeong, JaeyongKim, Bong HoGeum, Dae-MyongCho, Byung JinKim, Sanghyeon
Issued Date
2023-12-09
DOI
10.1109/IEDM45741.2023.10413845
URI
https://scholarworks.unist.ac.kr/handle/201301/91130
Fulltext
https://ieeexplore.ieee.org/abstract/document/10413845
Citation
IEEE International Electron Devices Meeting
Abstract
In this work, we first investigated the electrical and heat dissipation characteristics during the operation of top devices in a 3D sequential complementary field-effect transistors (CFETs) with Ge channel as top devices. The investigation was carried out with different inter-layer dielectric (ILD) thicknesses: 70 nm, 210 nm, and 1.4 μm. As the ILD thickness became thinner, we observed a higher body factor. This scaling of ILD thickness resulted in improved performance in the inverter gain and maximum operation frequency (fmax) for 3D sequential CFETs. Furthermore, we studied heat dissipation properties in a 3D sequential CFET structure using thermo-reflectance microscopy (TRM), considering different ILD thicknesses. Our findings revealed a significant reduction of approximately 70 % in thermal resistance (Rth). Additionally, the thermal time constant during the cooling phase was reduced by approximately 80 % in the CFETs with ILD thickness of 70 nm compared to the devices with ILD thickness of 1.4 μm. These results strongly indicate that ILD thickness is a crucial design parameter for determining device performance within its inherent 3D structure.
Publisher
IEEE

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