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정지훈

Jung, Jee-Hoon
Advanced Power Interface & Power Electronics Lab.
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Second-Harmonic Injection Strategy for ESS Interface Converter to Reduce Capacitor Size in MMC-SESS

Author(s)
Lee, Sang-JungPyo, Su-HanKang, Dae-WookShin, DongsulJung, Jee-Hoon
Issued Date
2025-09
DOI
10.1109/JESTPE.2025.3612150
URI
https://scholarworks.unist.ac.kr/handle/201301/89712
Citation
IEEE Journal of Emerging and Selected Topics in Power Electronics
Abstract
Modular multilevel converter with integrated supercapacitor (SC) energy storage system (MMC-SESS) has attracted significant attention due to its high power density, fast charge/discharge capability, and long lifespan. In battery energy storage systems (BESS), the mitigation of the second harmonic current (SHC) is essential for preserving battery lifetime. However, since the SC’s lifetime is barely affected by the SHC, the second-harmonic voltage (SHV) reduction of the sub-module (SM) capacitor is more desirable than the mitigation of the SHC. This approach can reduce the SM capacitor size and improve the system power density. A second-harmonic injection strategy is proposed for an ESS interface converter, specifically aiming to reduce the SHV of the SM capacitor while maintaining the SHC’s magnitude on the SC side. The characteristics of the SHV and SHC are analyzed across the operating points of the ESS interface converter. Based on this analysis, it is verified that the proposed strategy can reduce the capacitor size by up to 40% while maintaining the SHV and SHC magnitudes. The
effectiveness is experimentally validated in a controller-hardwarein-the-loop (C-HIL) environment using a 20 [kW] delta-connected MMC-SESS and a 5 [kW] single SM prototype.
Publisher
IEEE
ISSN
2168-6777

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