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Park, Heechun
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Architecture, Chip, and Package Co-design Flow for 2.5D Integration of Reusable IP Chiplets

Author(s)
Kim, JinwooPark, HeechunLim, Sung Kyu
Issued Date
2019-06-02
URI
https://scholarworks.unist.ac.kr/handle/201301/81638
Citation
IEEE/ACM Design Automation Conference (DAC), 2019
Publisher
IEEE/ACM

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