High multiplication factor capacitor multiplier for an on-chip PLL loop filter
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- High multiplication factor capacitor multiplier for an on-chip PLL loop filter
- Choi, Jaehyouk; Park, J.; Kim, W.; Lim, K.; Laskar, J.
- Issue Date
- INST ENGINEERING TECHNOLOGY-IET
- ELECTRONICS LETTERS, v.45, no.5, pp.239 - U8
- A capacitor multiplier with a high multiplication factor and low power consumption is proposed to integrate a large capacitor of a phase-locked loop (PLL) loop filter in a small chip area. The proposed capacitor multiplier makes capacitance of 516.8pF using an on-chip capacitor of 7.95pF with current consumption of 100A. An integer-N PLL with a channel space of 1MHz was fabricated with a 0.18m CMOS technology to employ the proposed capacitor multiplier.
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