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김진국

Kim, Jingook
Integrated Circuit and Electromagnetic Compatibility Lab.
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Design and implementation of a Power Management Integrated Circuit for Active EMI Filters

Alternative Title
Design and implementation of a Power Management Integrated Circuit for Active EMI Filters
Author(s)
Jeong, SangyeongKim, Jingook
Issued Date
2023-07
DOI
10.23075/jicas.2023.9.3.001
URI
https://scholarworks.unist.ac.kr/handle/201301/65168
Citation
IDEC Journal of Integrated Circuits and Systems, v.9, no.3, pp.1 - 6
Abstract
This paper proposes the design of power management integrated circuit (PMIC) within the active EMI filter (AEF). The buck converter has been implemented with AEF circuit. The designed IC is fabricated by TSMC 180nm BCD process. Semiconductor layout design including the above PWM signal generation circuit, 45V Power NDMOS and gate driver, and the overall size of the Buck converter is 2500µm*2500µm. The performance of the buck converter has been measured by oscilloscope after chip on board (COB) process. Input voltage range was 15v to 36v to generate 12V, and peak efficiency was measured as 66%. The AEF achieves better noise attenuation performance than 2stage L-C passive EMI filter (PEF) as about 6dB at 150khz, and the designed 1stage AEF totally attenuates 36dB from the bare noise without any resonance peak at over 1Mhz unlike the case of 2 stage L-C PEF. The active EMI filter with PMIC has been achieved better performance than larger size of passive EMI filter.
Publisher
반도체설계교육센터
ISSN
2384-2113
Keyword (Author)
Active EMI Filter (AEF)Bipolar-CMOS-DMOS (BCD) processConducted Emission (CE)Electromagnetic Interference (EMI)Integrated Circuits (ICs)Power Management IC (PMIC)

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