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정창욱

Jeong, Changwook
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PRAM process technology

Author(s)
Koh, G.H.Hwang, Y.N.Lee, S.H.Lee, S.Y.Ryoo, K.C.Park, J.H.Song, Y.J.Ahn, S.J.Jeong, ChangwookYeung, F.Kim, Y.-T.Park, J.-B.Jeong, G.T.Jeong, H.S.Kim, K.
Issued Date
2004-05-17
URI
https://scholarworks.unist.ac.kr/handle/201301/58544
Citation
2004 International Conference on Integrated Circuit Design and Technology, pp.53 - 57
Abstract
PRAM(Phase-Change RAM) is a promising memory that can solve the problems of conventional memory and has the nearly ideal memory characteristics. We reviewed the issues for high density PRAM integration. Writing current reduction is the most urgent problem for high density PRAM realization. We presented process factors which affect the writing current and the result of improvement. Finally we demonstrated results of 64Mb PRAM integration based on 0.18 μm CMOS technology.
Publisher
2004 ICIDT

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