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Jeong, Changwook
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dc.citation.conferencePlace US -
dc.citation.conferencePlace Austin, TX -
dc.citation.endPage 57 -
dc.citation.startPage 53 -
dc.citation.title 2004 International Conference on Integrated Circuit Design and Technology -
dc.contributor.author Koh, G.H. -
dc.contributor.author Hwang, Y.N. -
dc.contributor.author Lee, S.H. -
dc.contributor.author Lee, S.Y. -
dc.contributor.author Ryoo, K.C. -
dc.contributor.author Park, J.H. -
dc.contributor.author Song, Y.J. -
dc.contributor.author Ahn, S.J. -
dc.contributor.author Jeong, Changwook -
dc.contributor.author Yeung, F. -
dc.contributor.author Kim, Y.-T. -
dc.contributor.author Park, J.-B. -
dc.contributor.author Jeong, G.T. -
dc.contributor.author Jeong, H.S. -
dc.contributor.author Kim, K. -
dc.date.accessioned 2023-12-20T05:40:06Z -
dc.date.available 2023-12-20T05:40:06Z -
dc.date.created 2022-04-06 -
dc.date.issued 2004-05-17 -
dc.description.abstract PRAM(Phase-Change RAM) is a promising memory that can solve the problems of conventional memory and has the nearly ideal memory characteristics. We reviewed the issues for high density PRAM integration. Writing current reduction is the most urgent problem for high density PRAM realization. We presented process factors which affect the writing current and the result of improvement. Finally we demonstrated results of 64Mb PRAM integration based on 0.18 μm CMOS technology. -
dc.identifier.bibliographicCitation 2004 International Conference on Integrated Circuit Design and Technology, pp.53 - 57 -
dc.identifier.scopusid 2-s2.0-4143127826 -
dc.identifier.uri https://scholarworks.unist.ac.kr/handle/201301/58544 -
dc.language 영어 -
dc.publisher 2004 ICIDT -
dc.title PRAM process technology -
dc.type Conference Paper -
dc.date.conferenceDate 2004-05-17 -

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