Ag/CeO2(-45 nm)/ Pt devices exhibited forming-free bipolar resistive switching with a large memory window ( low-resistance-state (LRS)/ high-resistance-state (HRS) ratio > 10(6)) at a low switching voltage (<+/- 1 -2V) in voltage sweep condition. Also, they retained a large memory window (> 10(4)) at a pulse operation (+/- 5V, 50 mu s). The high oxygen ionic conductivity of the CeO2 layer as well as the migration of silver facilitated the formation of filament for the transition to LRS at a low voltage without a high voltage forming operation. Also, a certain amount of defects in the CeO2 layer was required for stable HRS with space-charge-limitedconduction, which was confirmed comparing the devices with non-annealed and annealed CeO2 layers.