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신세운

Shin, Se-Un
PICTUS Lab.
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A Hybrid Dual-Path Step-Down Converter with 96.2% Peak Efficiency Using a 250m μ Large-DCR Inductor

Author(s)
Huh, Y.Shin, Se-UnHong, S.-W.Woo, Y.-J.Ju, Y.-M.Choi, S.-W.Cho, G.-H.
Issued Date
2018-06-21
DOI
10.1109/VLSIC.2018.8502284
URI
https://scholarworks.unist.ac.kr/handle/201301/50010
Citation
IEEE Symposium on VLSI Circuits, pp.225 - 226
Abstract
A dual-path step-down converter (DPNC) is presented for achieving high power efficiency in mobile PMICs. The proposed DPNC supplies a load current (ILOAD) via two parallel paths using a hybrid structure with one inductor and one flying capacitor, solving an intrinsic problem of conventional buck converter topology (CBT) which is a significant power loss from a large DCR of inductor (RDCR). Therefore, DPNC not only achieves a high efficiency, but also reduces a heating problem. Additionally, DPNC can shrink a volume of PMIC set with a low manufacturing cost, by alleviating a RDCR specification of inductor. Although a 250mΩ of large-Dcr inductor was used, this paper achieved a 96.2% of peak-efficiency, and the total loss from parasitic resistance of external components was reduced to up to 30% compared to CBT. Furthermore, DPNC achieved much higher efficiency not only in a wide ILOAD range, but also in a wide VOUT/VIN range. © 2018 IEEE.
Publisher
Institute of Electrical and Electronics Engineers Inc.

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