File Download

There are no files associated with this item.

  • Find it @ UNIST can give you direct access to the published full text of this article. (UNISTARs only)
Related Researcher

신세운

Shin, Se-Un
PICTUS Lab.
Read More

Views & Downloads

Detailed Information

Cited time in webofscience Cited time in scopus
Metadata Downloads

Full metadata record

DC Field Value Language
dc.citation.conferencePlace US -
dc.citation.conferencePlace Honolulu -
dc.citation.endPage 226 -
dc.citation.startPage 225 -
dc.citation.title IEEE Symposium on VLSI Circuits -
dc.contributor.author Huh, Y. -
dc.contributor.author Shin, Se-Un -
dc.contributor.author Hong, S.-W. -
dc.contributor.author Woo, Y.-J. -
dc.contributor.author Ju, Y.-M. -
dc.contributor.author Choi, S.-W. -
dc.contributor.author Cho, G.-H. -
dc.date.accessioned 2023-12-19T15:47:25Z -
dc.date.available 2023-12-19T15:47:25Z -
dc.date.created 2021-02-10 -
dc.date.issued 2018-06-21 -
dc.description.abstract A dual-path step-down converter (DPNC) is presented for achieving high power efficiency in mobile PMICs. The proposed DPNC supplies a load current (ILOAD) via two parallel paths using a hybrid structure with one inductor and one flying capacitor, solving an intrinsic problem of conventional buck converter topology (CBT) which is a significant power loss from a large DCR of inductor (RDCR). Therefore, DPNC not only achieves a high efficiency, but also reduces a heating problem. Additionally, DPNC can shrink a volume of PMIC set with a low manufacturing cost, by alleviating a RDCR specification of inductor. Although a 250mΩ of large-Dcr inductor was used, this paper achieved a 96.2% of peak-efficiency, and the total loss from parasitic resistance of external components was reduced to up to 30% compared to CBT. Furthermore, DPNC achieved much higher efficiency not only in a wide ILOAD range, but also in a wide VOUT/VIN range. © 2018 IEEE. -
dc.identifier.bibliographicCitation IEEE Symposium on VLSI Circuits, pp.225 - 226 -
dc.identifier.doi 10.1109/VLSIC.2018.8502284 -
dc.identifier.scopusid 2-s2.0-85056826198 -
dc.identifier.uri https://scholarworks.unist.ac.kr/handle/201301/50010 -
dc.language 영어 -
dc.publisher Institute of Electrical and Electronics Engineers Inc. -
dc.title A Hybrid Dual-Path Step-Down Converter with 96.2% Peak Efficiency Using a 250m μ Large-DCR Inductor -
dc.type Conference Paper -
dc.date.conferenceDate 2018-06-18 -

qrcode

Items in Repository are protected by copyright, with all rights reserved, unless otherwise indicated.