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Baek, Woongki
Intelligent System Software Lab.
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A scalable, non-blocking approach to transactional memory

Author(s)
Baek, WoongkiChafi, HassanCasper, JaredCarlstrom, Brian D.McDonald, AustenMinh, Chi CaoKozyrakis, ChristosOlukotun, Kunle
Issued Date
2007-02-10
DOI
10.1109/HPCA.2007.346189
URI
https://scholarworks.unist.ac.kr/handle/201301/46869
Fulltext
http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=4147652
Citation
2007 IEEE 13th International Symposium on High Performance Computer Architecture, HPCA-13, pp.97 - 108
Abstract
Transactional Memory (TM) provides mechanisms that promise to simplify parallel programming by eliminating the need for locks and their associated problems (deadlock, livelock, priority inversion, convoying). For TM to be adopted in the long term, not only does it need to deliver on these promises, but it needs to scale to a high number of processors. To date, proposals for scalable TM have relegated livelock issues to user-level contention managers. This paper presents the first scalable TM implementation for directory-based distributed shared memory systems that is livelock free without the need for user-level intervention. The design is a scalable implementation of optimistic concurrency control that supports parallel commits with a two-phase commit protocol, uses write-back caches, and filters coherence messages. The scalable design is based on Transactional Coherence and Consistency (TCC), which supports continuous transactions and fault isolation. A performance evaluation of the design using both scientific and enterprise benchmarks demonstrates that the directory-based TCC design scales efficiently for NUMA systems up to 64 processors. © 2007 IEEE
Publisher
2007 IEEE 13th International Symposium on High Performance Computer Architecture, HPCA-13
ISSN
1530-0897

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