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Kim, Kyung Rok
Nano-Electronic Emerging Devices Lab.
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Si Single-Electron Transistors with Sidewall Depletion Gates and their Application to Dynamic Single-Electron Transistor Logic

Author(s)
Kim, Dae HwanSung, Suk-KangKim, Kyung RokChoi, Bum HoHwang, Sung WooAhn, DoyeolLee, Jong DukPark, Byung-Gook
Issued Date
2001-12-02
DOI
10.1109/IEDM.2001.979454
URI
https://scholarworks.unist.ac.kr/handle/201301/46633
Fulltext
https://ieeexplore.ieee.org/document/979454
Citation
IEEE International Electron Devices Meeting, pp.151 - 154
Abstract
Si single-electron transistors with sidewall depletion gates on a silicon-on-insulator nanowire are proposed and fabricated, using the combination of the conventional lithography and process technology. The size dependence of device characteristics shows good controllability and reproducibility, and a dynamic multi-functional SET logic is successfully demonstrated at 10 K, for the first time.
Publisher
IEEE Electron Device Society
ISSN
0163-1918

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