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- Lee, Jaiyong
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Input polling arbitration mechanism for a gigabit packet switch
- Author(s)
- Son, J.W., Oh, Y.Y., Lee, H.T., Lee, Jaiyong, Lee, S.B.
- Issued Date
- 1996-10
- Citation
- Electronics Letters, v.32, no.22, pp.2050 - 2051
- Abstract
- Two head of line (HOL) packet arbitration mechanisms in an input buffered gigabit packet switch are proposed. These mechanisms have significant advantages in simple implementation while their performances still remain at acceptable levels.
- Publisher
- Institution of Engineering and Technology
- ISSN
- 0013-5194
- Keyword (Author)
- Packet switching, Protocols
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