Synergistic combination of amorphous indium oxide with tantalum pentoxide for efficient electron transport in low-power electronics
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- Synergistic combination of amorphous indium oxide with tantalum pentoxide for efficient electron transport in low-power electronics
- Park, Song Yi; Heo, Jungwoo; Yoon, Yung Jin; Kim, Jae Won; Jang, Hyungsu; Walker, Bright; Kim, Jin Young
- Issue Date
- ROYAL SOC CHEMISTRY
- JOURNAL OF MATERIALS CHEMISTRY C, v.7, no.15, pp.4559 - 4566
- Among transparent metal oxide semiconductors, systems based on indium oxide currently deliver the best combination of electronic characteristics and optical transmittance, outperforming even the well-established polycrystalline silicon devices. Indium oxide has the unique property that uniform, amorphous films yield superior electronic properties compared to microcrystalline films; for this reason, Ga and Zn hetero-elements are usually added to disrupt crystallization and result in uniformly disordered films. However, dopants have a general tendency to increase the complexity and decrease the mobility of semiconductors and their addition might well be avoided if high-quality, amorphous In2O3 films could be grown without them. In this work, we show that this problem can be resolved by exploiting a synergistic interaction between solution-processed indium oxide (In2O3) and underlying tantalum pentoxide (Ta2O5) dielectric films. We observed that amorphous Ta2O5 inhibits crystallization of In2O3 leading to high-quality amorphous thin films with reduced oxygen deficiencies at the semiconductor/dielectric interface. Transparent Ta2O5/In2O3 TFTs with very low operating voltages were demonstrated with effective field-effect mobilities of up to 23.1 cm(2) V-1 s(-1) at only 3 V drain-source voltage (V-DS) using this approach. Additionally, the suppressed carrier density arising from reduced oxygen deficiencies reduced the drain current at 0 V gate bias (I-0) by six orders of magnitude from 0.25 mA to 10.8 nA, compared to a SiO2 reference device. These results highlight the importance of considering an underlying dielectric layer to maximize device performance.
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