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이종은
Lee, Jongeun

이종은

Department of Electrical Engineering(전기전자공학과)

  • Intelligent Computing and Codesign Lab.
  • Website
Research Interests
Deep learning processor architecture;Quantization;Energy efficiency;Reconfigurable architecture;Compilers
Lab Description
Our research area is co-design of hardware and software for optimizing cost, performance, power, and energy of emerging computer systems. Examples of such systems include AI (Artificial Intelligence) processors and Systems-on-Chips (SoCs) for media and signal processing applications.
Researcher ID Research Gate ORCiD Scopus Google Scholar
Previous
Mitigating The Impact of ReRAM I-V Nonlinearity and IR Drop via Fast Offline Network Training File

Lee, Sugil , Fouda, Mohammed E. , Quan, Chenghao , Lee, Jongeun , Eltawil, Ahmed , Kurdahi, Fadi

Article Issue Date2025-03 View87
Partial Sum Quantization for Reducing ADC Size in ReRAM-based Neural Network Accelerators File

Azamat, Azat , Asim, Faaiz , Kim, Jintae , Lee, Jongeun

Article Issue Date2023-12 View67
Training-Free Stuck-at Fault Mitigation for ReRAM-based Deep Learning Accelerators File

Quan, Chenghao , Fouda, Mohammed E. , Lee, Sugil , Jung, Giju , Lee, Jongeun , Eltawil, Ahmed , Kurdahi, Fadi

Article Issue Date2023-07 View85
Kernel Code Integrity Protection at the Physical Address Level on RISC-V File File

Ha, Seon , Yu, Minsang , Moon, Hyungon , Lee, Jongeun

Article Issue Date2023-06 View74
Offline Training-based Mitigation of IR Drop for ReRAM-based Deep Neural Network Accelerators File

Lee, Sugil , Fouda, Mohammed E. , Lee, Jongeun , Eltawil, Ahmed , Kurdahi, Fadi

Article Issue Date2023-02 View73
MLogNet: A Logarithmic Quantization-Based Accelerator for Depthwise Separable Convolution File

Choi, Jooyeon , Sim, Hyeonuk , Oh, Sangyun , Lee, Sugil , Lee, Jongeun

Article Issue Date2022-12 View140
Specializing CGRAs for Light-Weight Convolutional Neural Networks File

Lee, Jungi , Lee, Jongeun

Article Issue Date2022-10 View57
IR-QNN Framework: An IR Drop-Aware Offline Training Of Quantized Crossbar Arrays File File

Fouda, Mohammed E. , Lee, Sugil , Lee, Jongeun , Kim, Gun Hwan , Kurdahi, Fadi , Eltawil, Ahmed

Article Issue Date2020-12 View105
Bitstream-Based Neural Network for Scalable, Efficient, and Accurate Deep Learning Hardware File File

Sim, Hyeonuk , Lee, Jongeun

Article Issue Date2020-12 View69
RRNet: Repetition-Reduction Network for Energy Efficient Depth Estimation File File

Oh, Sangyun , Kim, Hye-Jin S. , Lee, Jongeun , Kim, Junmo

Article Issue Date2020-06 View58
Cost-effective stochastic MAC circuits for deep neural networks File

Sim, Hyeonuk , Lee, Jongeun

Article Issue Date2019-09 View52
Mask Technique for Fast and Efficient Training of Binary Resistive Crossbar Arrays File

Fouda, Mohammed E. , Lee, Sugil , Lee, Jongeun , Eltawil, Ahmed , Kurdahi, Fadi

Article Issue Date2019-07 View61
Double MAC on a DSP: Boosting the Performance of Convolutional Neural Networks on FPGAs File

Lee, Sugil , Kim, Daewoo , Nguyen, Dong , Lee, Jongeun

Article Issue Date2019-05 View79
An Efficient and Accurate Stochastic Number Generator Using Even-distribution Coding File

Zhakatayev, Aidyn , Kim, Kyounghoon , Choi, Kiyoung , Lee, Jongeun

Article Issue Date2018-12 View53
Efficient Execution of Stream Graphs on Coarse-Grained Reconfigurable Architectures File

Oh, Sangyun , Lee, Hongsik , Lee, Jongeun

Article Issue Date2017-12 View56
Efficient High-Level Synthesis for Nested Loops of Nonrectangular Iteration Spaces File

Sim, Hyeonuk , Rahman, Atul , Lee, Jongeun

Article Issue Date2016-08 View47
Mapping imperfect loops to coarse-grained reconfigurable architectures File

Sim, Hyeonuk , Lee, Hongsik , Seo, Seongseok , Lee, Jongeun

Article Issue Date2016-07 View65
Scalable application mapping for SIMD reconfigurable architecture File

Kim, Yongjoo , Lee, Jongeun , Lee, Jinyong , Paek, Yunheung

Article Issue Date2015-12 View94
Improving performance of loops on DIAM-based VLIW architectures File

Lee, Jinyong , Lee, Jongwon , Paek, Yunheung , Lee, Jongeun

Article Issue Date2014-05 View67
Configurable range memory for effective data reuse on programmable accelerators File

Lee, Jongeun , Seo, Seongseok , Paek, Jongkyung , Choi, Kiyoung

Article Issue Date2014-03 View57
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