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Lee, Myunghee
Automotive Electronic Systems and Semiconductor Lab
Research Interests
  • Automotive Electronic System Design
  • Automtoive Semicondutor IC design

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A three-layer 3-D silicon system using through-Si vertical optical interconnections and SiCMOS hybrid building blocks

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Title
A three-layer 3-D silicon system using through-Si vertical optical interconnections and SiCMOS hybrid building blocks
Author
Bond, Steve W.Vendier, OlivierLee, MyungheeJung, SungyongVrazel, MichaelLopez-Lagunas, AbelardoChai, SekDagnall, GeorgiannaBrooke, MartinJokerst, Nan MarieWills, D. ScottBrown, April
Keywords
Bit error rate; CMOS integrated circuits; Integrated optoelectronics; Semiconducting indium phosphide; Semiconducting silicon
Issue Date
1999-03
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Citation
IEEE JOURNAL OF SELECTED TOPICS IN QUANTUM ELECTRONICS, v.5, no.2, pp.276 - 286
Abstract
We present for the first time a three-dimensional (3-D) Si CMOS interconnection system consisting of three layers of optically interconnected hybrid integrated Si CMOS transceivers, The transceivers were fabricated using 0.8-mu m digital Si CMOS foundry circuits and were integrated with long wavelength InP-based emitters and detectors for through-Si vertical optical interconnections. The optical transmitter operated with a digital input and optical output with operation speeds up to 155 Mb/s, The optical receiver operated with an external optical input and a digital output up to 155 Mb/s. The transceivers were stacked to form 3-D through-Si vertical optical interconnections and a fabricated three-layer stack demonstrated optical interconnections between the three layers with operational speed of I Mb/s and bit-error rate of 10(-9)
URI
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DOI
10.1109/2944.778306
ISSN
1077-260X
Appears in Collections:
EE_Journal Papers
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