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dc.citation.endPage 286 -
dc.citation.number 2 -
dc.citation.startPage 276 -
dc.citation.title IEEE JOURNAL OF SELECTED TOPICS IN QUANTUM ELECTRONICS -
dc.citation.volume 5 -
dc.contributor.author Bond, Steve W. -
dc.contributor.author Vendier, Olivier -
dc.contributor.author Lee, Myunghee -
dc.contributor.author Jung, Sungyong -
dc.contributor.author Vrazel, Michael -
dc.contributor.author Lopez-Lagunas, Abelardo -
dc.contributor.author Chai, Sek -
dc.contributor.author Dagnall, Georgianna -
dc.contributor.author Brooke, Martin -
dc.contributor.author Jokerst, Nan Marie -
dc.contributor.author Wills, D. Scott -
dc.contributor.author Brown, April -
dc.date.accessioned 2023-12-22T12:12:04Z -
dc.date.available 2023-12-22T12:12:04Z -
dc.date.created 2015-07-23 -
dc.date.issued 1999-03 -
dc.description.abstract We present for the first time a three-dimensional (3-D) Si CMOS interconnection system consisting of three layers of optically interconnected hybrid integrated Si CMOS transceivers, The transceivers were fabricated using 0.8-mu m digital Si CMOS foundry circuits and were integrated with long wavelength InP-based emitters and detectors for through-Si vertical optical interconnections. The optical transmitter operated with a digital input and optical output with operation speeds up to 155 Mb/s, The optical receiver operated with an external optical input and a digital output up to 155 Mb/s. The transceivers were stacked to form 3-D through-Si vertical optical interconnections and a fabricated three-layer stack demonstrated optical interconnections between the three layers with operational speed of I Mb/s and bit-error rate of 10(-9) -
dc.identifier.bibliographicCitation IEEE JOURNAL OF SELECTED TOPICS IN QUANTUM ELECTRONICS, v.5, no.2, pp.276 - 286 -
dc.identifier.doi 10.1109/2944.778306 -
dc.identifier.issn 1077-260X -
dc.identifier.scopusid 2-s2.0-0032657590 -
dc.identifier.uri https://scholarworks.unist.ac.kr/handle/201301/12580 -
dc.identifier.url http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=778306 -
dc.identifier.wosid 000081935900017 -
dc.language 영어 -
dc.publisher IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC -
dc.title A three-layer 3-D silicon system using through-Si vertical optical interconnections and SiCMOS hybrid building blocks -
dc.type Article -
dc.description.journalRegisteredClass scopus -

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