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Lee, Jongeun
Renew: Reconfigurable and Neuromorphic Computing Lab
Research Interests
  • Reconfigurable processor architecture, neuromorphic processor, stochastic computing

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A Compiler Optimization to Reduce Soft Errors in Register Files

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Title
A Compiler Optimization to Reduce Soft Errors in Register Files
Other Titles
A Compiler Optimization to Reduce Soft Errors in Register Files
Author
Lee, JongeunShrivastava, Aviral
Keywords
Algorithms; Reliability; Performance; Embedded system; Soft error; Register file; Architectural vulnerability factor; Static analysis; Compilation; Link-time optimization
Issue Date
2009-07
Publisher
ASSOC COMPUTING MACHINERY
Citation
ACM SIGPLAN NOTICES, v.44, no.7, pp.41 - 49
Abstract
Register file (RF) is extremely vulnerable to soft errors, and traditional redundancy based schemes to protect the RF are prohibitive not only because RF is often in the timing critical path of the processor, but also since it is one of the hottest blocks on the chip, and therefore adding any extra circuitry to it is not desirable. Pure software approaches would be ideal in this case, but previous approaches that are based on program duplication have very significant runtime overheads, and others based on instruction scheduling are only moderately effective due to local scope. We show that the problem of protecting registers inherently requires inter-procedural analysis, and intra-procedural optimization are ineffective. This paper presents a pure compiler approach, based on inter-procedural code analysis to reduce the vulnerability of registers by temporarily writing live variables to protected memory. We formulate the problem as an integer linear programming problem and also present a very efficient heuristic algorithm. Our experiments demonstrate that our proposed technique can reduce the vulnerability of the RF by 33 similar to 37% on average and up to 66%, with a small 2% increase in runtime. In addition, our overhead reduction optimizations can effectively reduce the code size overhead, by more than 40% on average, to a mere 5 similar to 6%, as compared to highly optimized binaries
URI
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DOI
10.1145/1542452.1542459
ISSN
0362-1340
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EE_Journal Papers
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