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Showing results 1 to 7 of 7

A Compact Photocurrent Recording IC With High-Linearity Dual PWM Buffered R-DACs File

Park, Jee-Ho , Cha, Ji-Hyoung , Park, Yongjae , Kim, Seong-Jin

Article Issue Date2025-04 View102
A Low-Jitter and Low-Reference-Spur Ring-VCO- Based Injection-Locked Clock Multiplier Using a Triple-Point Background Calibrator File

Yoo, Seyeon , Choi, Seojin , Lee, Yongsun , Seong, Taeho , Lim, Younghyun , Choi, Jaehyouk

Article Issue Date2021-01 View85
Allocation of Always-On State Retention Storage for Power Gated Circuits-Steady-State- Driven Approach File

Kim, Taewhan , Park , Heechun

Article Issue Date2021-03 View109
An Input-Independent Loop Type-III Buck Converter With PSRR Improvement and EMI Suppression for Enhancing the Security of Edge Devices File

Lee, Chan-Ho , Park, Hyo-Jin , Cho, Joo-Mi , Choi, Hyeon-Ji , Park, Su-Min , Baik, Esun , Oh, Young-Ju , Ahn, Ho-Chan , Lee, Chan-Kyu , Shin, Jeeyoung , et al

Article Issue Date2022-09 View613
An Ultra-Low-Jitter, mmW-Band Frequency Synthesizer Based on Digital Subsampling PLL Using Optimally Spaced Voltage Comparators File

Kim, Juyeop , Lim, Younghyun , Yoon, Heein , Lee, Yongsun , Park, Hangi , Cho, Yoonseo , Seong, Taeho , Choi, Jaehyouk

Article Issue Date2019-12 View123
Clock Delivery Network Design and Analysis for Interposer-Based 2.5-D Heterogeneous Systems File

Murali, Gauthaman , Park , Heechun , Qin, Eric , Torun, Hakki Mert , Dolatsara, Majid Ahadi , Swaminathan, Madhavan , Krishna, Tushar , Lim, Sung Kyu

Article Issue Date2021-04 View85
Measurement and Analysis of System-Level ESD-Induced Jitter in a Delay-Locked Loop File

Jeong, Myeongjo , Shin, Minchul , Kim, Jinwoo , Seung, Manho , Lee, Seokkiu , Kim, Jingook

Article Issue Date2020-10 View120
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