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Kim, Kyung Rok
Nano-Electronic Emerging Devices Lab.
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Demonstration of standrad ternary inverter based on CMOS technology

Author(s)
Shin, SunhaeJang, EsanJeong, Jae WonKim, Kyung Rok
Issued Date
2016-06-12
DOI
10.1109/SNW.2016.7578036
URI
https://scholarworks.unist.ac.kr/handle/201301/37342
Fulltext
http://ieeexplore.ieee.org/document/7578036/
Citation
2016 IEEE Silicon Nanoelectronics Workshop (SNW 2016), pp.170 - 171
Abstract
We demonstrate a standard ternary inverter (STI) by using gate-last CMOS process with novel I-V characteristics based on off-state mechanism. Though the controllable α′ and β′ with respective design parameters, STI operation at VDD= 1 V have been investigated with static noise margin (SNM) of 210 mV.
Publisher
IEEE
ISBN
978-150900726-4

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