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| DC Field | Value | Language |
|---|---|---|
| dc.citation.title | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | - |
| dc.contributor.author | Kim, Sungjin | - |
| dc.contributor.author | Lee, Hyunsoo | - |
| dc.contributor.author | Hong, Seongmin | - |
| dc.contributor.author | Yoon, Heein | - |
| dc.contributor.author | Song, Taigon | - |
| dc.date.accessioned | 2026-05-08T13:30:08Z | - |
| dc.date.available | 2026-05-08T13:30:08Z | - |
| dc.date.created | 2026-03-13 | - |
| dc.date.issued | 2026-03 | - |
| dc.description.abstract | Artificial Intelligence (AI) has been increasingly utilized across various fields, including communications, healthcare, and Computer-Aided Design (CAD). However, AI has shown relatively limited advances in analog and RF circuit design, which are critical for modern communication systems such as 5G due to their higher complexity and nonlinear characteristics. For example, the Inductor-Capacitor Voltage-Controlled Oscillator (LC-VCO) is a crucial component in frequency synthesizers, determining the performance of RF systems, including high data transmission rates and wide bandwidth. In fact, LC-VCO design is challenging due to the high parameter variability and complex interactions between design variables, making it challenging to optimize parameters to meet target specifications. Thus, this study proposes a comprehensive LC-VCO design methodology compatible across multiple process nodes and supports optimization down to the layout level. We use Reinforcement Learning (RL) to navigate the nonlinear design space efficiently for schematic optimization and apply an algorithm from Gradient Descent to optimize the design at the physical layout level. We highlight that the versatility of our methodology is demonstrated by producing optimized Figures of Merit (FoM) across various technology nodes and frequency ranges, showcasing its potential as a universal design tool accessible to all users. | - |
| dc.identifier.bibliographicCitation | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | - |
| dc.identifier.doi | 10.1109/TCAD.2026.3680789 | - |
| dc.identifier.issn | 0278-0070 | - |
| dc.identifier.scopusid | 2-s2.0-105034754523 | - |
| dc.identifier.uri | https://scholarworks.unist.ac.kr/handle/201301/91645 | - |
| dc.identifier.url | https://ieeexplore.ieee.org/abstract/document/11474599 | - |
| dc.language | 영어 | - |
| dc.publisher | IEEE | - |
| dc.title | A Framework of Automated LC-VCO Design with Physical Layout Based on Reinforcement Learning | - |
| dc.type | Article | - |
| dc.description.isOpenAccess | FALSE | - |
| dc.type.docType | Article | - |
| dc.description.journalRegisteredClass | scie | - |
| dc.description.journalRegisteredClass | scopus | - |
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