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Low Power Edge - AI Platform Integrating a VCO - Based Sigma – Delta RDC and a Reconfigurable Analog TCN

Author(s)
Hwang, Jaeseong
Advisor
Kim, Jae Joon
Issued Date
2026-02
URI
https://scholarworks.unist.ac.kr/handle/201301/90971 http://unist.dcollection.net/common/orgView/200000966434
Abstract
Continuous environmental and biomedical monitoring requires sensor nodes that operate with minimal energy, cover wide input dynamics, and perform local decision-making without relying on power-hungry data converters or off-chip processors. However, practical sensor interfaces must simultaneously tolerate large variations in signal amplitude and timescale—ranging from slow- changing chemical resistive sensors to faster physiological waveforms—while maintaining accuracy under strict power budgets. To address these constraints, this thesis presents a low-power edge-AI platform that integrates (1) a wide-range resistive sensor readout IC (ROIC) based on a VCO-based sigma–delta (ΣΔ) resistor-to-digital converter (RDC) with adaptive voltage selection, and (2) a reconfigurable analog temporal convolutional network (TCN) classifier for real-time anomaly/event detection. The proposed ROIC targets low-resistance (low-R) and wide dynamic-range sensing where conventional resistive front-ends suffer from large bias currents, self-heating, and unstable reference generation, which can degrade both sensor integrity and conversion linearity. The RDC employs a voltage-regulated front-end with a first-order ΣΔ loop and a VCO-based integration/phase quantization stage. In particular, an adaptive voltage selector dynamically adjusts the reference level to keep the converter within an optimal operating window across large resistance variations, enabling stable conversion gain and suppressing error growth at the extremes of the measurable range. The architecture further supports a compact digital output interface through phase quantization and downstream bit reduction, allowing efficient off-chip readout and resistance reconstruction. Measurement results demonstrate a resistance readout range of 500 Ω to 500 kΩ with 293 µW power consumption, achieving 13.19-bit ENOB and 81.20 dB SNR, validating suitability for wide-range environmental sensing including low-R chemiresistor sensors. To enable on-node intelligence under tight power and area budgets, this work further proposes a charge-sharing MAC–based analog TCN that provides long receptive-field inference with programmable sampling and flexible analog/digital operation modes. Unlike fixed-function analog CNN accelerators that are often optimized for a single sampling condition or limited receptive field, the proposed processor maps dilated temporal convolutions onto a compact, reusable computation fabric. Programmable sampling and layer-wise operating scenarios allow the same hardware core to adapt across applications with different bandwidth and memory-retention requirements, while analog/digital memory partitioning provides an additional knob to trade off leakage robustness, throughput, and energy. A 4-channel depth-wise architecture with 256 input samples and 4 layers is realized with a compact parameter count (1.7k), demonstrating parameter-efficient feature extraction suitable for always-on operation. System-level validation shows robust classification performance on representative datasets, including arrhythmia detection on ECG (MIT-BIH dataset) with 0.9593 accuracy and 0.9377 sensitivity, and gas event detection (UCI Irvine CO gas dataset) with 0.9415 accuracy and 0.9710 sensitivity. By co-designing a wide-range, low-power resistive sensing front-end and a reconfigurable analog inference back-end, this thesis demonstrates an integrated approach toward scalable 24/7 edge sensing platforms capable of real-time detection under stringent energy constraints, and provides a pathway toward multi- domain sensor intelligence using a unified mixed-signal hardware framework.
Publisher
Ulsan National Institute of Science and Technology
Degree
Master
Major
Department of Electrical Engineering

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