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dc.citation.endPage 803 -
dc.citation.number 6 -
dc.citation.startPage 800 -
dc.citation.title IEEE ELECTRON DEVICE LETTERS -
dc.citation.volume 42 -
dc.contributor.author Geum, Dae-Myeong -
dc.contributor.author Kim, Seong Kwang -
dc.contributor.author Lim, Hyeong-Rak -
dc.contributor.author Park, Juhyuk -
dc.contributor.author Jeong, Jaeyong -
dc.contributor.author Han, Jae Hoon -
dc.contributor.author Choi, Won Jun -
dc.contributor.author Kim, Hyo-Jin -
dc.contributor.author Kim, Sanghyeon -
dc.date.accessioned 2026-03-26T10:42:34Z -
dc.date.available 2026-03-26T10:42:34Z -
dc.date.created 2026-03-24 -
dc.date.issued 2021-06 -
dc.description.abstract We systematically investigated the wafer- bonded interfaces of p(+)GaAs/n(+)InGaAs and p(+)InGaAs/ n(+)InGaAs by using a circular transmission line method (CTLM) for the increased extraction accuracy. Based on the low-temperature bonding process at 50 degrees C, the bonded interfaces were successfully fabricated without degradation of the material quality. While the fabricated devices exhibited the linearly increased resistance as a function of channel distances, the p(+)InGaAs/n(+)InGaAs structure revealed the improved interfacial resistivity of 3.9 x 10(-3) Omega center dot cm(2) compared with 3.3x10(-2) Omega center dot cm(2) of the p(+)GaAs/n(+)InGaAs. Since these values suggested good electrical properties in wafer-bonded structures, the developed wafer-bonded interfaces could be a good approach for integrating electronic and optoelectronic devices. -
dc.identifier.bibliographicCitation IEEE ELECTRON DEVICE LETTERS, v.42, no.6, pp.800 - 803 -
dc.identifier.doi 10.1109/LED.2021.3076817 -
dc.identifier.issn 0741-3106 -
dc.identifier.scopusid 2-s2.0-85105078350 -
dc.identifier.uri https://scholarworks.unist.ac.kr/handle/201301/90872 -
dc.identifier.url https://ieeexplore.ieee.org/abstract/document/9420112 -
dc.identifier.wosid 000652794800005 -
dc.language 영어 -
dc.publisher IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC -
dc.title Electrical Analysis for Wafer-Bonded Interfaces of p+GaAs/n+InGaAs and p+InGaAs/n+InGaAs -
dc.type Article -
dc.description.isOpenAccess FALSE -
dc.relation.journalWebOfScienceCategory Engineering, Electrical & Electronic -
dc.relation.journalResearchArea Engineering -
dc.type.docType Article -
dc.description.journalRegisteredClass scie -
dc.description.journalRegisteredClass scopus -
dc.subject.keywordAuthor p(+)GaAs/n(+)InGaAs -
dc.subject.keywordAuthor p(+)InGaAs/n(+)InGaAs -
dc.subject.keywordAuthor Wafer bonding -
dc.subject.keywordPlus GAAS SOLAR-CELL -
dc.subject.keywordPlus SI -
dc.subject.keywordPlus RESISTANCE -
dc.subject.keywordPlus CONTACTS -
dc.subject.keywordPlus MODEL -

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