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- Lee, Jongeun
- Intelligent Computing and Codesign Lab.
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| DC Field | Value | Language |
|---|---|---|
| dc.contributor.assignee | 울산과학기술원 | - |
| dc.contributor.author | 이수길 | - |
| dc.contributor.author | 이종은 | - |
| dc.date.accessioned | 2025-04-25T19:31:38Z | - |
| dc.date.application | 2022-06-14 | - |
| dc.date.available | 2025-04-25T19:31:38Z | - |
| dc.date.registration | 2025-02-17 | - |
| dc.identifier.patentApplicationNumber | 10-2022-0071996 | - |
| dc.identifier.patentRegistrationNumber | 10-2770907 | - |
| dc.identifier.uri | https://scholarworks.unist.ac.kr/handle/201301/86933 | - |
| dc.title | 저항성 메모리 기반의 신경망 가속기에 적용되는 연산 오차 보정 방법 | - |
| dc.type | Patent | - |
| dc.publisher.country | KO | - |
| dc.type.iprs | 특허 | - |
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