We demonstrate a high-performance and low-noise single-chip sub-terahertz (THz) imager array by integrating ground (gnd)-out trantenna ( tran sistor-an tenna ) with a reset switch, analog buffer, multiplexer, and preamplifier using 65-nm CMOS technology. The channel charge asymmetry of sub-THz pixel device is enhanced with ac-gnd and ac-open load impedance design for gnd-out and gnd-in trantenna, respectively. The reset modulation switch suppresses output overshoot. Thus, the detector delay time of gnd-out trantenna, with a considerably smaller output junction capacitance than gnd-in trantenna, is reduced to sub- mu s regime. In 0.1-THz direct illumination setup, the gnd-out trantenna with analog buffer circuitry experimentally achieves high-speed sub-THz imager operation up to 600 kHz with a commercial-level delay time = 0.98 mu s ( 15 times faster than gnd-in case). Owing to low-impedance analog buffer design for gnd-out trantenna with high-speed reset switch modulation ( similar to 300 kHz), a high responsivity ( R-V=620 kV/W) and ultralow noise-equivalent power (NEP = 8.44 pW/Hz (0.5) ) are obtained for the peripheral circuitry-integrated sub-THz imager.