Full metadata record
DC Field | Value | Language |
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dc.citation.startPage | 2300900 | - |
dc.citation.title | ADVANCED ELECTRONIC MATERIALS | - |
dc.contributor.author | Kang, Minseung | - |
dc.contributor.author | Cho, Ung | - |
dc.contributor.author | Kang, Jaehyeon | - |
dc.contributor.author | Han, Narae | - |
dc.contributor.author | Seo, Hyeong Jun | - |
dc.contributor.author | Yang, Jee-Eun | - |
dc.contributor.author | Shin, Seokyeon | - |
dc.contributor.author | Kim, Taehyun | - |
dc.contributor.author | Kim, Sangwook | - |
dc.contributor.author | Jeong, Changwook | - |
dc.contributor.author | Kim, Sangbum | - |
dc.date.accessioned | 2024-05-24T10:35:10Z | - |
dc.date.available | 2024-05-24T10:35:10Z | - |
dc.date.created | 2024-05-21 | - |
dc.date.issued | 2024-05 | - |
dc.description.abstract | Charge storage synaptic circuits employing InGaZnO thin-film transistors (IGZO TFTs) and capacitors are a promising candidate for on-chip trainable neural network hardware accelerators. However, IGZO TFTs often exhibit bias instability. For synaptic memory applications, the programming transistors are predominantly exposed to asymmetric off-state biases, and a unique field-dependent on-current reduction under off-scenario is observed which may result in programming current variation. Further examination of the phenomenon is conducted with transmission line-like method and degradation recovery tests, and current reduction can be attributed to contact resistance increase by charge trapping in the source and drain electrode and the channel region. The current decrease is subsequently formulated with a stretched exponential model with bias-dependent parameters for quantitative circuit analysis under off-state degradation. A neural network hardware acceleration simulator is utilized to assess the complicated impact the off-state current degradation could instigate on on-chip trainable IGZO TFT-based synapse arrays. The simulation results generally demonstrate deteriorated training accuracy with aggravated off-state instability, and the accuracy trend is elucidated from the perspective of weight symmetry point. Stability of InGaZnO transistors is analyzed under the off-state electric field bias, which is the most dominant scenario in InGaZnO transistor-based synapse circuits. Unique on-current reduction is observed, and its characteristics are modeled based on experimental results. The stress model is applied to neural network simulation, and the impact of the degradation is evaluated. image | - |
dc.identifier.bibliographicCitation | ADVANCED ELECTRONIC MATERIALS, pp.2300900 | - |
dc.identifier.doi | 10.1002/aelm.202300900 | - |
dc.identifier.issn | 2199-160X | - |
dc.identifier.scopusid | 2-s2.0-85192367681 | - |
dc.identifier.uri | https://scholarworks.unist.ac.kr/handle/201301/82699 | - |
dc.identifier.wosid | 001215500000001 | - |
dc.language | 영어 | - |
dc.publisher | WILEY | - |
dc.title | Field Induced Off-State Instability in InGaZnO Thin-Film Transistor and its Impact on Synaptic Circuits | - |
dc.type | Article | - |
dc.description.isOpenAccess | TRUE | - |
dc.relation.journalWebOfScienceCategory | Nanoscience & Nanotechnology; Materials Science, Multidisciplinary; Physics, Applied | - |
dc.relation.journalResearchArea | Science & Technology - Other Topics; Materials Science; Physics | - |
dc.type.docType | Article; Early Access | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.subject.keywordAuthor | InGaZnO (IGZO) | - |
dc.subject.keywordAuthor | off-state stress | - |
dc.subject.keywordAuthor | on current reduction | - |
dc.subject.keywordAuthor | capacitor-based memory | - |
dc.subject.keywordAuthor | contact resistance | - |
dc.subject.keywordPlus | SCHOTTKY-BARRIER | - |
dc.subject.keywordPlus | INFERENCE | - |
dc.subject.keywordPlus | MEMORY | - |
dc.subject.keywordPlus | CHARGE | - |
dc.subject.keywordPlus | LAYER | - |
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