IEEE TRANSACTIONS ON ELECTRON DEVICES, v.49, no.10, pp.1833 - 1835
Abstract
We have proposed and fabricated a novel 50-nm nMOSFET with side-gates, which induce inversion layers for virtual source/drain extensions (SDE). The 50-nm nMOSFETs show excellent suppression of the short channel effect and reasonable current drivability [subthreshold swing of 86 mV/decade, drain-induced barrier lowering (DIBL) of 112 mV, and maximum transconductance (g(m)) of 470 muS/mum at V-D = 1.5 V], resulting from the ultra-shallow virtual SDE junction. Since both the main gate and the side-gate give good cut-off characteristics, a possible advantage of this structure in the application to multi-input NAND gates was investigated.