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Lee, Jongeun
Intelligent Computing and Codesign Lab.
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dc.citation.endPage 37 -
dc.citation.number 1 -
dc.citation.startPage 1 -
dc.citation.title ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS -
dc.citation.volume 12 -
dc.contributor.author Lee, Jongeun -
dc.contributor.author Choi, Kiyoung -
dc.contributor.author Dutt, Nikil D. -
dc.date.accessioned 2023-12-22T09:37:39Z -
dc.date.available 2023-12-22T09:37:39Z -
dc.date.created 2014-10-28 -
dc.date.issued 2007-01 -
dc.description.abstract Application-specific instructions can significantly improve the performance, energy-efficiency, and code size of configurable processors. While generating new instructions from application-specific operation patterns has been a common way to improve the instruction set (IS) of a configurable processor, automating the design of ISs for given applications poses new challenges - -how to create as well as utilize new instructions in a systematic manner, and how to choose the best set of application-specific instructions considering the various effects the new instructions may have on the data path and the compilation To address these problems, we present a novel IS synthesis framework that optimizes the IS through an efficient instruction encoding for the given application as well as for the given data path architecture. We first build a library of new instructions created with various encoding alternatives taking into account the data path architecture constraints, and then select the best set of instructions while satisfying the instruction bitwidth constraint. We formulate the problem using integer linear programming and also present an effective heuristic algorithm. Experimental results using our technique generate ISs that show improvements of up to about 40% over the native IS for several application benchmarks running on typical embedded RISC processors. -
dc.identifier.bibliographicCitation ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS, v.12, no.1, pp.1 - 37 -
dc.identifier.doi 10.1145/1188275.1188283 -
dc.identifier.issn 1084-4309 -
dc.identifier.scopusid 2-s2.0-33846950858 -
dc.identifier.uri https://scholarworks.unist.ac.kr/handle/201301/7892 -
dc.identifier.url http://www.scopus.com/inward/record.url?partnerID=HzOxMe3b&scp=33846950858 -
dc.identifier.wosid 000244336100008 -
dc.language 영어 -
dc.publisher ASSOC COMPUTING MACHINERY -
dc.title Instruction set synthesis with efficient instruction encoding for configurable processors -
dc.type Article -
dc.description.journalRegisteredClass scie -
dc.description.journalRegisteredClass scopus -
dc.subject.keywordAuthor algorithms -
dc.subject.keywordAuthor design -
dc.subject.keywordAuthor application-specific instruction set processor
(ASIP)
-
dc.subject.keywordAuthor configurable processor -
dc.subject.keywordAuthor ISA customization and specialization -
dc.subject.keywordAuthor instruction encoding -
dc.subject.keywordAuthor bitwidth-economical -
dc.subject.keywordPlus ARCHITECTURE -

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