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Park, Kibog
Emergent Materials & Devices Lab.
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Self-Selective Non-Destructive Read-Out for Ferroelectric Memory Based on Field Effect Transistor with Graphene Channel

Author(s)
Jung, SungchulPark, JinyoungKim, JunhyungSong, WonhoJo, JaehyeongPark, HyunjaeKong, MyongKang, SeokhyeongSheeraz, MuhammadKim, Ill WonKim, Tae HeonPark, Kibog
Issued Date
2022-07-18
URI
https://scholarworks.unist.ac.kr/handle/201301/75683
Citation
20th International Symposium on the Physics of Semiconductors and Applications
Abstract
Ferroelectric graphene field effect transistor (FeGFET) has been studied by several research groups as one way for overcoming the destructive read-out process of ferroelectric random-access memory (FeRAM). In the FeGFET structure, the conductance of graphene channel can vary depending on the direction of spontaneous polarization (SP) in the ferroelectric gate insulator thanks to the linear energy-momentum dispersion relation near the Dirac point [1] and the memory state then can be sensed by measuring the channel conductance. Although the FeGFET structure resolves the problem associated with the destructive read-out process, the low on/off ratio due to the minimal conductance of graphene channel itself brings about the necessity of attaching an additional cell selector (transistor or diode) to each memory cell for realizing the random accessibility [2]. In this work, we experimentally demonstrate a new concept of non-destructive read-out process using transconductance measurement for FeGFET. It is found that the memory state of FeGFET, specified by the SP direction of ferroelectric layer, can be sensed unambiguously by measuring the transconductance of graphene channel. With the proposed read-out method, it is possible to construct an array of ferroelectric memory cells in the form of a cross-point structure where the transconductance of a crossing cell can be measured selectively without any additional selector, which is a main limiting factor in terms of circuit scaling [3]. This read-out process with the FeGFET structure can be a plausible solution for fabricating high speed, ultra-low power, long lifetime, and high-density 3D stackable non-volatile memory.

[1] A. K. Geim, and K. S. Novoselov, Nature Materials, 6, 183-191 (2007).
[2] X. Zhang, et al, IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), 1-3 (2014).
[3] H. S. P. Wong, et al, Proceedings of the IEEE, 98, 2201-2227 (2010).
Publisher
한국물리학회

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