IEEE International Midwest Symposium on Circuits and Systems
Abstract
A highly energy-efficient compute-in-memory (CIM) processor for a low-power spiking neural network (SNN) is proposed in this paper. Most previous CIM processors were limited to binary neural networks with poor accuracy. Other CIM processors for multi-bit precision convolutional neural networks were developed to increase the accuracy, but they showed low energy efficiency. In addition, most previous works suffered from a power-hungry analog-to-digital converter (ADC) for partial sum computation. They consumed lots of energy due to the current-mode or voltage-mode analog computations. To resolve the issues, we propose a Time-Domain SNN CIM (TS-CIM) processor with 9T1C bitcell for highly energy-efficient time-domain computation with a compact area. The proposed Time multiply-and-accumulate circuit removes ADC that consumes a large portion of the system energy. In addition, the Analog Precision Reconstruction Unit is introduced for multi-bit reconstruction of the phase-coded input activations of SNN. Thanks to pipelined architecture, TS-CIM enables execution of the whole convolution layers without wasted cycles for the stall. The proposed TS-CIM is designed with 65 nm CMOS logic technology and achieves 701.7 TOPS/W energy efficiency.