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Neural Process based Bayesian Optimization for Semiconductor Design Factor Search under Constraint

Author(s)
Lee, Chanhui
Advisor
Lim, Sungbin
Issued Date
2023-02
URI
https://scholarworks.unist.ac.kr/handle/201301/74103 http://unist.dcollection.net/common/orgView/200000665334
Publisher
Ulsan National Institute of Science and Technology (UNIST)

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