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Park, Hyesung
Low-Dimensional Materials & Energy Conversion Lab
Research Interests
  • Nano materials, renewable energy, optoelectronic devices

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Demonstration of a Subthreshold FPGA Using Monolithically Integrated Graphene Interconnects

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Title
Demonstration of a Subthreshold FPGA Using Monolithically Integrated Graphene Interconnects
Author
Lee, Kyeong-JaePark, HyesungKong, JingChandrakasan, Anantha P.
Issue Date
2013-01
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Citation
IEEE TRANSACTIONS ON ELECTRON DEVICES, v.60, no.1, pp.383 - 390
Abstract
We have demonstrated a subthreshold FPGA system using monolithically integrated graphene wires. The graphene wires replace double-length lines in the interconnect fabric of a custom FPGA implemented in 0.18-μm CMOS. The four-layer graphene wires have lower capacitance than the CMOS aluminum wires, resulting in up to 2.11× faster speeds and 1.54× lower interconnect energy when driven by a low-swing voltage of 0.4 V. This paper presents the first graphene-based system application and experimentally demonstrates the potential of using low-capacitance graphene wires for ultralow power electronics.
URI
https://scholarworks.unist.ac.kr/handle/201301/6971
URL
https://ieeexplore.ieee.org/document/6353910/
DOI
10.1109/TED.2012.2225150
ISSN
0018-9383
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