We have integrated a 64Mb nonvolatile random access memory using phase transition phenomena. Based on 0.18um-CMOS technologies, the vertical contact typed memory cell is fabricated. The device density can be sharply increased with decreasing the writing current and the GST size. But, for reduction of writing current, issues including set and interface resistances should be stabilized. Additionally, our results also show the feasibility of 256Mb nonvolatile PRAM with writing time below 100ns.
Publisher
Institute of Electrical and Electronics Engineers Inc.