A 10-Gb/s reconfigurable CMOS equalizer employing a transition detector-based output monitoring technique for band-limited serial links
Cited 7 times in
Cited 6 times in
- Title
- A 10-Gb/s reconfigurable CMOS equalizer employing a transition detector-based output monitoring technique for band-limited serial links
- Author
- Bien, Franklin; Kim, Hyoungsoo; Hur, Youngsik; Maeng, Moonkyun; Cha, Jeongwon; Chandramouli, Soumya; Gebara, Edward; Laskar, Joy
- Keywords
- 0.18-μm CMOS; 10 Gb/s; Band-limited serial links; Flnite-impluse (FIR) filter; Output monitoring; Reconfigurable equalization; Transition detector (TD)
- Issue Date
- 2006-12
- Publisher
- IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
- Citation
- IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, v.54, no.12, pp.4538 - 4547
- Abstract
- Limitations in data transmission caused by band limitation in broadband communication links can. be improved significantly by using equalization techniques. In this paper, a reconfigurable feed-forward equalizer employing a transition detector (TD)-based calibration technique that provides a universal channel compensation solution is presented. Moreover, the newly proposed TD-based calibration technique monitors the channel output for further adjustments over time in order to provide optimum compensation in performance. The reconfigurable equalizer is implemented in a 0.18-mu m CMOS technology. The prototype successfully demonstrates the feasibility of the TD-based calibration technique for output monitoring.
- URI
- ; Go to Link
- DOI
- 10.1109/TMTT.2006.884660
- ISSN
- 0018-9480
- Appears in Collections:
- EE_Journal Papers
- Files in This Item:
-
2-s2.0-33847761135.pdf
Download
can give you direct access to the published full text of this article. (UNISTARs only)
Show full item record
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.