File Download

There are no files associated with this item.

  • Find it @ UNIST can give you direct access to the published full text of this article. (UNISTARs only)
Related Researcher

박기복

Park, Kibog
Emergent Materials & Devices Lab.
Read More

Views & Downloads

Detailed Information

Cited time in webofscience Cited time in scopus
Metadata Downloads

Pseudo-Wrap-Gate InAs Nanowire Field Effect Transistor with Pre-Deposited Gate Insulator

Author(s)
Jin, HanbyulMo, Kyu HyungHwang, JeongwooShin, Jae CheolYu, Byeong-SungKim, Ju-JinBae, Myung-HoKim, NamPark, Kibog
Issued Date
2017-04-21
URI
https://scholarworks.unist.ac.kr/handle/201301/39695
Citation
한국물리학회 2017년 봄학술논문발표회
Abstract
We fabricated the lateral pseudo-wrap-gated n-type InAs nanowire (NW) field effect transistor (FET) with markedly reduced fabrication steps. The whole surfaces of n-InAs NWs were uniformly covered with gate insulator (Al2O3) at grown (vertical) state on Si substrate by using atomic layer deposition (ALD). This all-around Al2O3 gate insulator is found to be the main contributor of stable device operation and channel passivation [1]. The device fabrication was completed simply with single metal (source, drain, gate contact pads) deposition and photoresist coating after transferring n-InAs NW onto SiO2/Si substrate. The cross-sectional high-resolution transmission electron microscopy (HRTEM) image taken after device fabrication confirms that the n-InAs NW has hexagonal cross-section and its surface is uniformly coated with ~10 nm thick Al2O3 layer. The completed n-InAs NW FET showed the good current saturation and low voltage operation with the peak transconductance of ~13.4 mS/mm, the field effect mobility of ~1,039 cm2/Vs, and the current on/off ratio of ~750.
Publisher
한국물리학회

qrcode

Items in Repository are protected by copyright, with all rights reserved, unless otherwise indicated.