Analysis of On-chip Low-Dropout Regulator Induced PDN Noise at High-speed Output Buffer

Abstract

This study analyzes on-chip PDN noise induced by on-chip LDO regulator at high-speed buffer. On-chip PDN noise induced by on-chip LDO regulator is considerably dependent on the speed and input sequence of the output buffer. Off-chip power noise has negligible impact on noise induced by on-chip LDO regulator due to the inherent LDO circuit characteristic. Feedback noise, on-chip LDO circuit parameters, and off-chip ground design dominantly determine the noise and jitter in a different way. Finally, this study proposes the useful design guidance for reducing PDN noise and output jitter induced by on-chip LDO regulator at high-speed buffer.