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- Lee, Jongeun
- Intelligent Computing and Codesign Lab.
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| DC Field | Value | Language |
|---|---|---|
| dc.citation.conferencePlace | KO | - |
| dc.citation.conferencePlace | Seoul | - |
| dc.citation.title | 54th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2011 | - |
| dc.contributor.author | Han, Kyuseung | - |
| dc.contributor.author | Park, Seongsik | - |
| dc.contributor.author | Choi, Kiyoung | - |
| dc.contributor.author | Paek, Jong Kyung | - |
| dc.contributor.author | Lee, Jongeun | - |
| dc.date.accessioned | 2023-12-20T03:06:00Z | - |
| dc.date.available | 2023-12-20T03:06:00Z | - |
| dc.date.created | 2013-06-24 | - |
| dc.date.issued | 2011-08-07 | - |
| dc.description.abstract | This paper presents various novel techniques for improving coarse-grained reconfigurable architectures. Specifically, it presents techniques for supporting IEEE single precision floating-point standard, efficient handling of loop-carried dependency with variable-length FIFOs, efficient mapping of control flows, and sharing data with a host processor for transparent binary acceleration. Experiments with benchmark examples demonstrate the effectiveness of the proposed techniques. | - |
| dc.identifier.bibliographicCitation | 54th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2011 | - |
| dc.identifier.doi | 10.1109/MWSCAS.2011.6026299 | - |
| dc.identifier.isbn | 978-161284857-0 | - |
| dc.identifier.issn | 1548-3746 | - |
| dc.identifier.scopusid | 2-s2.0-80053622492 | - |
| dc.identifier.uri | https://scholarworks.unist.ac.kr/handle/201301/37562 | - |
| dc.identifier.url | https://ieeexplore.ieee.org/document/6026299/ | - |
| dc.identifier.wosid | 000296057200036 | - |
| dc.language | 영어 | - |
| dc.publisher | IEEE | - |
| dc.title | Techniques for Improving Coarse-Grained Reconfigurable Architectures | - |
| dc.type | Conference Paper | - |
| dc.date.conferenceDate | 2011-08-07 | - |
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